參數(shù)資料
型號: Am29F002B-120PEB
廠商: Advanced Micro Devices, Inc.
英文描述: High Speed CMOS Logic Inverting Quad 2-Input Multiplexer with 3-State Outputs 16-CDIP -55 to 125
中文描述: 2兆位(256畝× 8位)的CMOS 5.0伏,只引導(dǎo)扇區(qū)閃存
文件頁數(shù): 16/40頁
文件大?。?/td> 792K
代理商: AM29F002B-120PEB
November 28, 2000
Am29F002B/Am29F002NB
15
Erase Suspend/Erase Resume Commands
The Erase Suspend command allows the system to
interrupt a sector erase operation and then read data
from, or program data to, any sector not selected for
erasure. This command is valid only during the sector
erase operation, including the 50 μs time-out period
during the sector erase command sequence. The
Erase Suspend command is ignored if written during
the chip erase operation or Embedded Program algo-
rithm. Writing the Erase Suspend command during the
Sector Erase time-out immediately terminates the
time-out period and suspends the erase operation.
Addresses are “don’t-cares” when writing the Erase
Suspend command.
When the Erase Suspend command is written during a
sector erase operation, the device requires a maximum
of 20 μs to suspend the erase operation. However,
when the Erase Suspend command is written during
the sector erase time-out, the device immediately ter-
minates the time-out period and suspends the erase
operation.
After the erase operation has been suspended, the
system can read array data from or program data to
any sector not selected for erasure. (The device “erase
suspends” all sectors selected for erasure.) Normal
read and write timings and command definitions apply.
Reading at any address within erase-suspended
sectors produces status data on DQ7–DQ0. The
system can use DQ7, or DQ6 and DQ2 together, to
determine if a sector is actively erasing or is erase-sus-
pended. See “Write Operation Status” for information
on these status bits.
After an erase-suspended program operation is com-
plete, the system can once again read array data within
non-suspended sectors. The system can determine the
status of the program operation using the DQ7 or DQ6
status bits, just as in the standard program operation.
See “Write Operation Status” for more information.
The system may also write the autoselect command
sequence when the device is in the Erase Suspend
mode. The device allows reading autoselect codes
even at addresses within erasing sectors, since the
codes are not stored in the memory array. When the
device exits the autoselect mode, the device reverts to
the Erase Suspend mode, and is ready for another
valid operation. See “Autoselect Command Sequence”
for more information.
The system must write the Erase Resume command
(address bits are “don’t care”) to exit the erase suspend
mode and continue the sector erase operation. Further
writes of the Resume command are ignored. Another
Erase Suspend command can be written after the
device has resumed erasing.
相關(guān)PDF資料
PDF描述
AM29F002B-120PI High Speed CMOS Logic Inverting Quad 2-Input Multiplexer with 3-State Outputs 16-CDIP -55 to 125
Am29F002B-120PIB High Speed CMOS Logic 8-Bit Addressable Latch 16-CDIP -55 to 125
Am29F002B-55ECB High Speed CMOS Logic 8-Bit Addressable Latch 16-CDIP -55 to 125
Am29F002B-55EE High Speed CMOS Logic Triple 3-Input NOR Gates 14-CDIP -55 to 125
AM29F002B-55EI High Speed CMOS Logic Triple 3-Input NOR Gates 14-CDIP -55 to 125
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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