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參數(shù)資料
| 型號(hào)： | AM29DS323DB50EIN |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation Flash Memory |
| 中文描述： | 32兆位（4個(gè)M × 8位/ 2米x 16位），1.8伏的CMOS只，同時(shí)作業(yè)快閃記憶體 |
| 文件頁數(shù)： | 26/56頁 |
| 文件大?。?/td> | 641K |
| 代理商： | AM29DS323DB50EIN |
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24
Am29DS323D
23480A5 October10,2006
D A T A S H E E T
COMMAND DEFINITIONS
Writing specific address and data commands or se-
quences into the command register initiates device
operations.
Table 14
defines the valid register com-
mand sequences. Writing
incorrect
address and
data values
or writing them in the
improper se-
quence
resets the device to reading array data.
All addresses are latched on the falling edge of WE#
or CE#, whichever happens later. All data is latched on
the rising edge of WE# or CE#, whichever happens
first. Refer to the AC Characteristics section for timing
diagrams.
Reading Array Data
The device is automatically set to reading array data
after device power-up. No commands are required to
retrieve data. Each bank is ready to read array data
after completing an Embedded Program or Embedded
Erase algorithm.
After the device accepts an Erase Suspend command,
the corresponding bank enters the erase-sus-
pend-read mode, after which the system can read
data from any non-erase-suspended sector within the
same bank. After completing a programming operation
in the Erase Suspend mode, the system may once
again read array data with the same exception. See
the Erase Suspend/Erase Resume Commands sec-
tion for more information.
The system
must
issue the reset command to return a
bank to the read (or erase-suspend-read) mode if DQ5
goes high during an active program or erase opera-
tion, or if the bank is in the autoselect mode. See the
next section, Reset Command, for more information.
See also Requirements for Reading Array Data in the
Device Bus Operations section for more information.
The Memory Array Read-Only Operations table pro-
vides the read parameters, and Figure 13 shows the
timing diagram.
Reset Command
Writing the reset command resets the banks to the
read or erase-suspend-read mode. Address bits are
don’t cares for this command.
The reset command may be written between the se-
quence cycles in an erase command sequence before
erasing begins. This resets the bank to which the sys-
tem was writing to reading array data. Once erasure
begins, however, the device ignores reset commands
until the operation is complete.
The reset command may be written between the
sequence cycles in a program command sequence
before programming begins. This resets the bank to
which the system was writing to reading array data. If
the program command sequence is written to a bank
that is in the Erase Suspend mode, writing the reset
command returns that bank to the erase-sus-
pend-read mode. Once programming begins, however,
the device ignores reset commands until the operation
is complete.
The reset command may be written between the se-
quence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command
must be written to return to reading array data. If a
bank entered the autoselect mode while in the Erase
Suspend mode, writing the reset command returns
that bank to the erase-suspend-read mode.
If DQ5 goes high during a program or erase operation,
writing the reset command returns the banks to read-
ing array data (or erase-suspend-read mode if that
bank was in Erase Suspend).
Autoselect Command Sequence
The autoselect command sequence allows the host
system to access the manufacturer and device codes,
and determine whether or not a sector is protected.
Table 14
shows the address and data requirements.
This method is an alternative to that shown in
Table 7
,
which is intended for PROM programmers and re-
quires V
ID
on address pin A9. The autoselect
command sequence may be written to an address
within a bank that is either in the read or
erase-suspend-read mode. The autoselect command
may not be written while the device is actively pro-
gramming or erasing in the other bank.
The autoselect command sequence is initiated by first
writing two unlock cycles. This is followed by a third
write cycle that contains the bank address and the
autoselect command. The bank then enters the
autoselect mode. The system may read at any address
within the same bank any number of times without ini-
tiating another autoselect command sequence. The fol-
lowing table describes the hex address requirements
for the various autoselect functions, and the resulting
data. BA represents the bank address, and SA repre-
sents the sector address.
* For byte mode, ignore data output bits D8–DQ15.
Description
Word
Address
Byte
Address
Read Data*
Maufacturer ID
(BA) + 00
(BA) + 00
01
Device ID
(BA) + 01
(BA) + 02
22B7 (top boot)
22B8 (bottom boot)
Sector Block
Protect Verify
(SA) + 02
(SA) + 04
00 (unlocked),
01 (locked)
Secured
Silicon Sector
Factory
Protect
(BA) + 03
(BA) + 06
85 (factory locked)
05 (not factory locked)
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| AM29DS323DT50WMI | 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation Flash Memory |
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