參數(shù)資料
型號(hào)： AM29DL640G70EIN
廠商： Advanced Micro Devices, Inc.
英文描述： 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
中文描述： 64兆位（8米× 8位/ 4米x 16位），3.0伏的CMOS只，同步讀/寫閃存
文件頁數(shù)： 3/52頁
文件大?。?/td> 735K
代理商： AM29DL640G70EIN
June 7, 2002
Am29DL640G
3
P R E L I M I N A R Y
TABLE OF CONTENTS
Product Selector Guide. . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6
Special Handling Instructions for BGA Packages .....................6
Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 9
Table 1. Am29DL640G Device Bus Operations ................................9
Word/Byte Configuration.......................................................... 9
Requirements for Reading Array Data .....................................9
Writing Commands/Command Sequences ............................10
Accelerated Program Operation .............................................10
Autoselect Functions ..............................................................10
Simultaneous Read/Write Operations with Zero Latency .......10
Standby Mode........................................................................ 10
Automatic Sleep Mode ...........................................................11
RESET#: Hardware Reset Pin ...............................................11
Output Disable Mode ..............................................................11
Table 2. Am29DL640G Sector Architecture ....................................11
Table 3. Bank Address ....................................................................14
Table 4. SecSi
TM
Sector Addresses................................................14
Autoselect Mode..................................................................... 14
Table 5. Am29DL640G Autoselect Codes, (High Voltage Method) 15
Sector/Sector Block Protection and Unprotection.................. 16
Table 6. Am29DL640G Boot Sector/Sector Block Addresses for
Protection/Unprotection ...................................................................16
Write Protect (WP#) ................................................................17
Table 7. WP#/ACC Modes ..............................................................17
Temporary Sector Unprotect ..................................................17
Figure 1. Temporary Sector Unprotect Operation........................... 17
Figure 2. In-System Sector Protect/Unprotect Algorithms.............. 18
SecSi (Secured Silicon) Sector
FlashMemoryRegion ............................................................19
Hardware Data Protection ......................................................19
Low VCC Write Inhibit ............................................................19
Write Pulse “Glitch” Protection ...............................................20
Logical Inhibit ..........................................................................20
Power-Up Write Inhibit ............................................................20
Common Flash Memory Interface (CFI). . . . . . . 20
Table 8. CFI Query Identification String.......................................... 20
Table 9. System Interface String......................................................21
Table 10. Device Geometry Definition............................................ 21
Table 11. Primary Vendor-Specific Extended Query...................... 22
Command Definitions . . . . . . . . . . . . . . . . . . . . . 23
Reading Array Data ................................................................23
Reset Command .....................................................................23
Autoselect Command Sequence ............................................23
Enter SecSi Sector/Exit SecSi Sector
Command Sequence ..............................................................23
Byte/Word Program Command Sequence .............................24
Unlock Bypass Command Sequence .....................................24
Figure 3. Program Operation.......................................................... 25
Chip Erase Command Sequence ...........................................25
Sector Erase Command Sequence ........................................25
Erase Suspend/Erase Resume Commands ...........................26
Figure 4. Erase Operation.............................................................. 26
Table 12. Am29DL640G Command Definitions............................. 27
Write Operation Status. . . . . . . . . . . . . . . . . . . . . 28
DQ7: Data# Polling .................................................................28
Figure 5. Data# Polling Algorithm.................................................. 28
RY/BY#: Ready/Busy#............................................................ 29
DQ6: Toggle Bit I ....................................................................29
Figure 6. Toggle Bit Algorithm........................................................ 29
DQ2: Toggle Bit II ...................................................................30
Reading Toggle Bits DQ6/DQ2 ...............................................30
DQ5: Exceeded Timing Limits ................................................30
DQ3: Sector Erase Timer .......................................................30
Table 13. Write Operation Status ...................................................31
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 32
Figure 7. Maximum Negative OvershootWaveform...................... 32
Figure 8. Maximum Positive OvershootWaveform........................ 32
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 9. I
CC1
Current vs. Time (Showing Active and
AutomaticSleepCurrents)............................................................. 34
Figure 10. Typical I
CC1
vs. Frequency............................................ 34
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 11. Test Setup.................................................................... 35
Figure 12. Input Waveforms and Measurement Levels................. 35
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 36
Read-Only Operations ...........................................................36
Figure 13. Read Operation Timings............................................... 36
Hardware Reset (RESET#) ....................................................37
Figure 14. Reset Timings............................................................... 37
Word/Byte Configuration (BYTE#) ..........................................38
Figure 15. BYTE# Timings for Read Operations............................ 38
Figure 16. BYTE# Timings for Write Operations............................ 38
Erase and Program Operations ..............................................39
Figure 17. Program Operation Timngs.......................................... 40
Figure 18. Accelerated Program Timing Diagram.......................... 40
Figure 19. Chip/Sector Erase Operation Timngs.......................... 41
Figure 20. Back-to-back Read/Write Cycle Timings...................... 42
Figure 21. Data# Polling Timings (During Embedded Algorithms). 42
Figure 22. Toggle Bit Timngs (During Embedded Algorithms)...... 43
Figure 23. DQ2 vs. DQ6................................................................. 43
Temporary Sector Unprotect ..................................................44
Figure 24. Temporary Sector Unprotect Timng Diagram.............. 44
Figure 25. Sector/Sector Block Protect and
Unprotect Timing Diagram............................................................. 45
Alternate CE# Controlled Erase and Program Operations .....46
Figure 26. Alternate CE# Controlled Write (Erase/Program)
OperationTimings.......................................................................... 47
Erase And Programming Performance. . . . . . . . 48
Latchup Characteristics. . . . . . . . . . . . . . . . . . . . 48
TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 48
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
FBE063—63-Ball Fine-Pitch Ball Grid Array (FBGA)
12x11mmpackage ..............................................................49
LAA064—64-Ball Fortified Ball Grid Array (
F
BGA)
13x11mmpackage ..............................................................50
TS 048—48-Pin Standard TSOP ............................................51
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 52
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