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| 型號： | AM29BDS64HD8VMI |
| 廠商： | Spansion Inc. |
| 英文描述： | 128 or 64 Megabit (8 M or 4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| 中文描述： | 128或64兆位（8米或4個M x 16位）的CMOS 1.8伏，只有同時讀/寫，突發(fā)模式閃存 |
| 文件頁數(shù)： | 71/89頁 |
| 文件大?。?/td> | 913K |
| 代理商： | AM29BDS64HD8VMI |
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May 10, 2006 27024B3
Am29BDS128H/Am29BDS640H
69
D A T A S H E E T
AC CHARACTERISTICS
Erase/Program Operations
Notes:
1.
2.
Not 100% tested.
Asynchronous mode allows both Asynchronous and Synchronous
program operation. Synchronous mode allows both Asynchronous
and Synchronous program operation.
In asynchronous program operation timing, addresses are latched
on the falling edge of WE# or rising edge of AVD#. In synchronous
3.
program operation timing, addresses are latched on the first of either
the falling edge of WE# or the active edge of CLK.
See the “Erase and Programming Performance” section for more
information.
Does not include the preprogramming time.
4.
5.
Parameter
Description
75 MHz
66 MHz
54 MHz
Unit
JEDEC
Standard
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
45
50
55
ns
t
AVWL
t
AS
Address Setup
Time (Notes 2,
3)
Synchronous
Min
4
5
ns
Asynchronous
0
t
WLAX
t
AH
Address Hold
Time (Notes 2,
3)
Synchronous
Min
5.5
6
7
ns
Asynchronous
15
20
20
t
AVDP
AVD# Low Time
Min
10
12
ns
t
DVWH
t
DS
Data Setup Time
Min
20
45
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write
Min
0
ns
t
CAS
CE# Setup Time to AVD#
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
20
30
ns
t
WHWL
t
WPH
Write Pulse Width High
Min
15
20
20
ns
t
SR/W
Latency Between Read and Write Operations
Min
0
ns
t
VID
V
ACC
Rise and Fall Time
Min
500
ns
t
VIDS
V
ACC
Setup Time (During Accelerated
Programming)
Min
1
μs
t
VCS
V
CC
Setup Time
Min
50
μs
t
ELWL
t
CS
CE# Setup Time to WE#
Min
0
ns
t
AVSW
AVD# Setup Time to WE#
Min
4
5
ns
t
AVHW
AVD# Hold Time to WE#
Min
4
5
ns
t
ACS
Address Setup Time to CLK (Notes 2, 3)
Min
4
5
ns
t
ACH
Address Hold Time to CLK (Notes 2, 3)
Min
5.5
6
7
ns
t
AVHC
AVD# Hold Time to CLK
Min
4
5
ns
t
CSW
Clock Setup Time to WE#
Min
5
ns
t
SEA
Sector Erase Accept Timeout
Max
50
μs
t
ESL
Erase Suspend Latency
Max
35
μs
t
ASP
Toggle Time During Sector Protection
Typ
100
μs
t
PSP
Toggle Time During Programming within a
Protected Sector
Typ
1
μs
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