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| 型號(hào)： | AM29BDS640GBC4WSI |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 20 ns, PBGA80 |
| 封裝： | 11 X 12 MM, 0.80 MM PITCH, FBGA-80 |
| 文件頁(yè)數(shù)： | 4/77頁(yè) |
| 文件大小： | 1581K |
| 代理商： | AM29BDS640GBC4WSI |
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10
Am29BDS640G
25903C2 May 9, 2006
Data
Sheet
Input/Output Descriptions
A21-A0
=
Address inputs
DQ15-DQ0
=
Data input/output
CE#
=
Chip Enable input. Asynchronous relative to CLK for
the Burst mode.
OE#
=
Output Enable input. Asynchronous relative to CLK
for the Burst mode.
WE#
=
Write Enable input.
VCC
=
Device Power Supply
(1.65 – 1.95 V).
VIO
=
Input & Output Buffer Power Supply (either 1.65 –
1.95 V or 2.7 – 3.15 V).
VSS
=Ground
VSSIO
=
Output Buffer Ground
NC
=
No Connect; not connected internally
RDY
=
Ready output; indicates the status of the Burst read.
Low = data not valid at expected time. High = data
valid.
CLK
=
CLK is not required in asynchronous mode. In burst
mode, after the initial word is output, subsequent
active edges of CLK increment the internal address
counter.
AVD#
=
Address Valid input. Indicates to device that the valid
address is present on the address inputs (A21–A0).
Low = for asynchronous mode, indicates valid
address; for burst mode, causes starting address to
be latched.
High = device ignores address inputs
RESET#
=
Hardware reset input. Low = device resets and
returns to reading array data
WP#
=
Hardware write protect input. At VIL, disables
program and erase functions in the two outermost
sectors. Should be at VIH for all other conditions.
ACC
=
At VID, accelerates programming; automatically
places device in unlock bypass mode. At VIL, locks all
sectors. Should be at VIH for all other conditions.
Logic Symbol
22
16
DQ15–DQ0
A21–A0
CE#
OE#
WE#
RESET#
CLK
RDY
AVD#
WP#
ACC
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