- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366397 > Am29BDD160GT54D (Advanced Micro Devices, Inc.) 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory PDF資料下載
參數(shù)資料
| 型號(hào)： | Am29BDD160GT54D |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| 中文描述： | 16兆位（1 M中的x 16-bit/512畝× 32位），2.5伏的CMOS只突發(fā)模式，雙啟動(dòng)，同步讀/寫閃存 |
| 文件頁數(shù)： | 35/80頁 |
| 文件大?。?/td> | 3476K |
| 代理商： | AM29BDD160GT54D |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁當(dāng)前第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
Am29BDD160G
33
Command Definitions
Writing specific address and data commands or se-
quences into the command register initiates device
operations. Tables
18-21
define the valid register
command sequences. Writing
incorrect address
and data values
or writing them in the
improper
sequence
resets the device to reading array data.
All addresses are latched on the falling edge of WE#
or CE#, whichever happens later. All data is latched
on the rising edge of WE# or CE#, whichever hap-
pens first. Refer to the
AC Characteristics
section for
timing diagrams.
Reading Array Data in Non-burst Mode
The device is automatically set to reading array data
after device power-up. No commands are required to
retrieve data. The device is also ready to read array
data after completing an Embedded Program or Em-
bedded Erase algorithm.
After the device accepts an Erase Suspend com-
mand, the device enters the Erase Suspend mode.
The system can read array data using the standard
read timings, except that if it reads at an address
within erase-suspended sectors, the device outputs
status data. After completing a programming opera-
tion in the Erase Suspend mode, the system may
once again read array data with the same exception.
See
Sector Erase and Program Suspend Command
for more information on this mode.
The system
must
issue the reset command to re-en-
able the device for reading array data if DQ5 goes
high, or while in the autoselect mode. See the
The
programming of the PPB Lock Bit for a given sector
can be verified by writing a PPB Lock Bit status verify
command to the device.
section.
See also
Asynchronous Read Operation (Non-Burst)
in the
Key to Switching Waveforms
section for more
information. See the
Sector Erase and Program Re-
sume Command
sections for more information on
this mode.
Reading Array Data in Burst Mode
The device is capable of very fast Burst mode read
operations. The configuration register sets the read
configuration, burst order, frequency configuration,
and burst length.
Upon power on, the device defaults to the asynchro-
nous mode. In this mode, CLK, and ADV# are
ignored. The device operates like a conventional
Flash device. Data is available t
/ t
nanoseconds
after address becomes stable, CE# become as-
serted. The device enters the burst mode by
enabling synchronous burst reads in the configura-
tion register. The device exits burst mode by
disabling synchronous burst reads in the configura-
tion register. (See
Command Definitions
).
The RESET# command will not terminate the Burst
mode. System reset (power on reset) will terminate
the Burst mode.
The device has the regular control pins, i.e. Chip En-
able (CE#), Write Enable (WE#), and Output Enable
(OE#) to control normal read and write operations.
Moreover, three additional control pins have been
added to allow easy interface with minimal glue logic
to a wide range of microprocessors / microcontrollers
for high performance Burst read capability. These
additional pins are Address Valid (ADV#) and Clock
(CLK). CE#, OE#, and WE# are asynchronous (rela-
tive to CLK). The Burst mode read operation is a
synchronous operation tied to the edge of the clock.
The microprocessor / microcontroller supplies only
the initial address, all subsequent addresses are au-
tomatically generated by the device with a timing
defined by the Configuration Register definition. The
Burst read cycle consists of an address phase and a
corresponding data phase.
During the address phase, the Address Valid (ADV#)
pin is asserted (taken Low) for one clock period. To-
gether with the edge of the CLK, the starting burst
address is loaded into the internal Burst Address
Counter. The internal Burst Address Counter can be
configured to either the Linear modes (See “Initial
Access Delay Configuration”).
57h
AEh
0002h
Bank Organization (1 byte)
00 = If data at 4Ah is zero
XX = Number of banks
58h
B0h
000Fh
Bank 1 Region Information (1 byte)
XX = Number of Sectors in Bank 1
59h
B2h
001Fh
Bank 2 Region Information (1 byte)
XX = Number of Sectors in Bank 2
5Ah
B4h
0000h
Bank 3 Region Information (1 byte)
XX = Number of Sectors in Bank 3
5Bh
B6h
0000h
Bank 4 Region Information (1 byte)
XX = Number of Sectors in Bank 4
Table 17. CFI Primary Vendor-Specific Extended Query (Sheet 3 of 3)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| Am29BDD160GB54D | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| Am29BDD160GT64C | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| Am29BDD160GT65A | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| Am29BDD160GB64C | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| Am29BDD160GB65A | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM29BDS128HE9VKI | 制造商:Advanced Micro Devices 功能描述:Flash Mem Parallel/Serial 1.8V 128M-Bit 8M x 16 50ns 80-Pin FBGA |
| AM29BDS643GT5KVAI | 制造商:Spansion 功能描述:FLASH PARALLEL 1.8V 64MBIT 4MX16 55NS 44FBGA - Trays |
| AM29BL802CB-65RZET | 制造商:Spansion 功能描述: |
| AM29C01WW WAF | 制造商:Advanced Micro Devices 功能描述: |
| AM29C10API | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。