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參數(shù)資料
| 型號： | AM29BDD160GB20DPBF |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| 中文描述： | 16兆位（1 M中的x 16-bit/512畝× 32位），2.5伏的CMOS只突發(fā)模式，雙啟動，同步讀/寫閃存 |
| 文件頁數(shù)： | 17/79頁 |
| 文件大小： | 1368K |
| 代理商： | AM29BDD160GB20DPBF |
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June 7, 2006
Am29BDD160G
15
If the dev
i
ce
is
de
s
elected d
u
r
i
ng er
asu
re or progr
a
m-
m
i
ng, the dev
i
ce dr
a
w
s
a
ct
i
ve c
u
rrent
u
nt
i
l the oper
a
-
t
i
on
is
completed
.
I
CC5
i
n the “DC Ch
a
r
a
cter
is
t
i
c
s
”
s
ect
i
on on p
a
ge 5
3
repre
s
ent
s
the
s
t
a
nd
b
y c
u
rrent
s
pec
i
f
i
c
a
t
i
on
.
Caut
i
on
:
enter
i
ng the
s
t
a
nd
b
y mode v
ia
the RE
S
ET#
p
i
n
a
l
s
o re
s
et
s
the dev
i
ce to the re
a
d mode
a
nd flo
a
t
s
the d
a
t
a
I/O p
i
n
s.
F
u
rthermore, enter
i
ng I
CC7
d
u
r
i
ng
a
progr
a
m or er
as
e oper
a
t
i
on w
i
ll le
a
ve erroneo
us
d
a
t
a
i
n the
a
ddre
ss
loc
a
t
i
on
s
b
e
i
ng oper
a
ted on
a
t the t
i
me
of the RE
S
ET# p
u
l
s
e
.
The
s
e loc
a
t
i
on
s
re
qui
re
u
pd
a
t-
i
ng
a
fter the dev
i
ce re
su
me
s
s
t
a
nd
a
rd oper
a
t
i
on
s.
Refer to the “RE
S
ET#
:
H
a
rdw
a
re Re
s
et P
i
n”
s
ect
i
on
for f
u
rther d
is
c
ussi
on of the RE
S
ET# p
i
n
a
nd
i
t
s
f
u
nc-
t
i
on
s.
RE
S
ET#: Hardware Re
s
et P
i
n
The RE
S
ET# p
i
n
is
a
n
a
ct
i
ve low
si
gn
a
l th
a
t
is
us
ed to
re
s
et the dev
i
ce
u
nder
a
ny c
i
rc
u
m
s
t
a
nce
s.
A log
i
c “0”
on th
is
p
i
n force
s
the dev
i
ce o
u
t of
a
ny mode th
a
t
is
c
u
rrently exec
u
t
i
ng
ba
ck to the re
s
et
s
t
a
te
.
The RE-
S
ET# p
i
n m
a
y
b
e t
i
ed to the
s
y
s
tem re
s
et c
i
rc
ui
try
.
A
s
y
s
tem re
s
et wo
u
ld th
us
a
l
s
o re
s
et the dev
i
ce
.
To
a
vo
i
d
a
potent
ia
l
bus
content
i
on d
u
r
i
ng
a
s
y
s
tem re
s
et,
the dev
i
ce
is
is
ol
a
ted from the DQ d
a
t
a
bus
b
y tr
is
t
a
t-
i
ng the d
a
t
a
o
u
tp
u
t p
i
n
s
for the d
u
r
a
t
i
on of the RE
S
ET
p
u
l
s
e
.
All p
i
n
s
a
re “don’t c
a
re” d
u
r
i
ng the re
s
et oper
a
-
t
i
on
.
If RE
S
ET#
is
ass
erted d
u
r
i
ng
a
progr
a
m or er
as
e op-
er
a
t
i
on, the RY/BY# p
i
n rem
ai
n
s
low
u
nt
i
l the re
s
et op-
er
a
t
i
on
is
i
ntern
a
lly complete
.
Th
is
a
ct
i
on re
qui
re
s
b
etween 1
μs
a
nd 7
μs
for e
i
ther Ch
i
p Er
as
e or
S
ector
Er
as
e
.
The RY/BY# p
i
n c
a
n
b
e
us
ed to determ
i
ne
when the re
s
et oper
a
t
i
on
is
complete
.
Otherw
is
e,
a
llow for the m
a
x
i
m
u
m re
s
et t
i
me of 11
μs.
If RE
S
ET#
is
ass
erted when
a
progr
a
m or er
as
e oper
a
t
i
on
is
not
exec
u
t
i
ng (RY/BY# = “1”), the re
s
et oper
a
t
i
on w
i
ll com-
plete w
i
th
i
n 500 n
s.
Si
nce the Am2
9
BDD160
is
a
Si
-
m
u
lt
a
neo
us
Oper
a
t
i
on dev
i
ce the
us
er m
a
y re
a
d
a
ba
nk
a
fter 500 n
s
i
f the
ba
nk w
as
i
n the re
a
d/re
s
et
mode
a
t the t
i
me RE
S
ET# w
as
ass
erted
.
If one of the
ba
nk
s
w
as
i
n the m
i
ddle of e
i
ther
a
progr
a
m or er
as
e
oper
a
t
i
on when RE
S
ET# w
as
ass
erted, the
us
er m
us
t
w
ai
t 11
μs
b
efore
a
cce
ssi
ng th
a
t
ba
nk
.
A
ss
ert
i
ng RE
S
ET# d
u
r
i
ng
a
progr
a
m or er
as
e oper
a
-
t
i
on le
a
ve
s
erroneo
us
d
a
t
a
s
tored
i
n the
a
ddre
ss
loc
a
-
t
i
on
s
b
e
i
ng oper
a
ted on
a
t the t
i
me of dev
i
ce re
s
et
.
The
s
e loc
a
t
i
on
s
need
u
pd
a
t
i
ng
a
fter the re
s
et oper
a
-
t
i
on
is
complete
.
S
ee F
i
g
u
re 1
9
for t
i
m
i
ng
s
pec
i
f
i
c
a
-
t
i
on
s.
A
ss
ert
i
ng RE
S
ET#
a
ct
i
ve d
u
r
i
ng V
CC
a
nd V
IO
power-
u
p
is
re
qui
red to g
ua
r
a
ntee proper dev
i
ce
i
n
i
-
t
ia
l
i
z
a
t
i
on
u
nt
i
l V
CC
a
nd V
IO
h
a
ve re
a
ched the
i
r
s
te
a
dy
s
t
a
te volt
a
ge
s.
Output D
is
able Mode
S
ee T
ab
le 1 Dev
i
ce B
us
Oper
a
t
i
on for OE# Oper
a
t
i
on
i
n O
u
tp
u
t D
isab
le Mode
.
Auto
s
elect Mode
The
au
to
s
elect mode prov
i
de
s
m
a
n
u
f
a
ct
u
rer
a
nd de-
v
i
ce
i
dent
i
f
i
c
a
t
i
on,
a
nd
s
ector protect
i
on ver
i
f
i
c
a
t
i
on,
thro
u
gh
i
dent
i
f
i
er code
s
o
u
tp
u
t on DQ7–DQ0
.
Th
is
mode
is
pr
i
m
a
r
i
ly
i
ntended for progr
a
mm
i
ng e
qui
p-
ment to
au
tom
a
t
i
c
a
lly m
a
tch
a
dev
i
ce to
b
e pro-
gr
a
mmed w
i
th
i
t
s
corre
s
pond
i
ng progr
a
mm
i
ng
a
lgor
i
thm
.
However, the
au
to
s
elect code
s
c
a
n
a
l
s
o
b
e
a
cce
ss
ed
i
n-
s
y
s
tem thro
u
gh the comm
a
nd reg
is
ter
.
When
usi
ng progr
a
mm
i
ng e
qui
pment, the
au
to
s
elect
mode re
qui
re
s
V
ID
on
a
ddre
ss
p
i
n A
9.
Addre
ss
p
i
n
s
A6, A1,
a
nd A0 m
us
t
b
e
as
s
hown
i
n T
ab
le 12 (top
b
oot dev
i
ce
s
) or T
ab
le 1
3
(
b
ottom
b
oot dev
i
ce
s
)
.
In
a
d-
d
i
t
i
on, when ver
i
fy
i
ng
s
ector protect
i
on, the
s
ector
a
d-
dre
ss
m
us
t
a
ppe
a
r on the
a
ppropr
ia
te h
i
ghe
s
t order
a
ddre
ss
bi
t
s
(
s
ee T
ab
le
s
11
a
nd 12)
.
S
ee T
ab
le 5
s
how
s
the rem
ai
n
i
ng
a
ddre
ss
bi
t
s
th
a
t
a
re don’t c
a
re
.
When
a
ll nece
ssa
ry
bi
t
s
h
a
ve
b
een
s
et
as
re
qui
red,
the progr
a
mm
i
ng e
qui
pment m
a
y then re
a
d the corre-
s
pond
i
ng
i
dent
i
f
i
er code on DQ7–DQ0
.
To
a
cce
ss
the
au
to
s
elect code
s
i
n-
s
y
s
tem, the ho
s
t
s
y
s
tem c
a
n
issu
e the
au
to
s
elect comm
a
nd v
ia
the
comm
a
nd
.
Th
is
method doe
s
not re
qui
re V
ID
.
S
ee
“Comm
a
nd Def
i
n
i
t
i
on
s
” for det
ai
l
s
on
usi
ng the
au
to
s
e-
lect mode
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29BDD160G | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| Am29BDD160GT54D | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| Am29BDD160GB54D | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| Am29BDD160GT64C | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| Am29BDD160GT65A | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
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參數(shù)描述 |
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