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參數(shù)資料
| 型號： | AM29BDD160GB20CPBK |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| 中文描述： | 16兆位（1 M中的x 16-bit/512畝× 32位），2.5伏的CMOS只突發(fā)模式，雙啟動，同步讀/寫閃存 |
| 文件頁數(shù)： | 27/79頁 |
| 文件大?。?/td> | 1368K |
| 代理商： | AM29BDD160GB20CPBK |
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June 7, 2006
Am29BDD160G
25
In order to
a
ch
i
eve the
s
e
s
t
a
te
s
, three type
s
of “
bi
t
s
”
a
re go
i
ng to
b
e
us
ed
:
Per
sis
tent Protect
i
on B
i
t (PPB)
A
si
ngle Per
sis
tent (non-vol
a
t
i
le) Protect
i
on B
i
t
is
as
-
si
gned to
a
m
a
x
i
m
u
m of fo
u
r
s
ector
s
(
s
ee the
s
ector
a
ddre
ss
t
ab
le
s
for
s
pec
i
f
i
c
s
ector protect
i
on gro
u
p-
i
ng
s
)
.
All
8
K
b
yte
b
oot-
b
lock
s
ector
s
h
a
ve
i
nd
i
v
i
d
ua
l
s
ector Per
sis
tent Protect
i
on B
i
t
s
(PPB
s
) for gre
a
ter
flex
ibi
l
i
ty
.
E
a
ch PPB
is
i
nd
i
v
i
d
ua
lly mod
i
f
iab
le thro
u
gh
the
PPB Wr
i
te Command
.
Note
:
If
a
PPB re
qui
re
s
er
asu
re,
a
ll of the
s
ector PPB
s
m
us
t f
i
r
s
t
b
e preprogr
a
mmed pr
i
or to PPB er
asi
ng
.
All
PPB
s
er
as
e
i
n p
a
r
a
llel,
u
nl
i
ke progr
a
mm
i
ng where
i
n-
d
i
v
i
d
ua
l PPB
s
a
re progr
a
mm
ab
le
.
It
is
the re
s
pon
sibi
l-
i
ty of the
us
er to perform the preprogr
a
mm
i
ng
oper
a
t
i
on
.
Otherw
is
e,
a
n
a
lre
a
dy er
as
ed
s
ector PPB
s
h
as
the potent
ia
l of
b
e
i
ng over-er
as
ed
.
There
is
no
h
a
rdw
a
re mech
a
n
is
m to prevent
s
ector PPB
s
over-er
asu
re
.
Per
sis
tent Protect
i
on B
i
t Lock (PPB Lock)
A glo
ba
l vol
a
t
i
le
bi
t
.
When
s
et to “1”, the PPB
s
c
a
nnot
b
e ch
a
nged
.
When cle
a
red (“0”), the PPB
s
a
re
ch
a
nge
ab
le
.
There
is
only one PPB Lock
bi
t per de-
v
i
ce
.
The PPB Lock
is
cle
a
red
a
fter power-
u
p or h
a
rd-
w
a
re re
s
et
.
There
is
no comm
a
nd
s
e
qu
ence to
u
nlock
the PPB Lock
.
Dynam
i
c Protect
i
on B
i
t (DYB)
A vol
a
t
i
le protect
i
on
bi
t
is
assi
gned for e
a
ch
s
ector
.
After power-
u
p or h
a
rdw
a
re re
s
et, the content
s
of
a
ll
DYB
s
is
“0”
.
E
a
ch DYB
is
i
nd
i
v
i
d
ua
lly mod
i
f
iab
le
thro
u
gh the DYB Wr
i
te Comm
a
nd
.
When the p
a
rt
s
a
re f
i
r
s
t
s
h
i
pped, the PPB
s
a
re
cle
a
red, the DYB
s
a
re cle
a
red,
a
nd PPB Lock
is
de-
f
au
lted to power
u
p
i
n the cle
a
red
s
t
a
te – me
a
n
i
ng the
PPB
s
a
re ch
a
nge
ab
le
.
When the dev
i
ce
is
f
i
r
s
t powered on the DYB
s
power
u
p cle
a
red (
s
ector
s
not protected)
.
The Protect
i
on
S
t
a
te for e
a
ch
s
ector
is
determ
i
ned
b
y the log
i
c
a
l OR
of the PPB
a
nd the DYB rel
a
ted to th
a
t
s
ector
.
For the
s
ector
s
th
a
t h
a
ve the PPB
s
cle
a
red, the DYB
s
control
whether or not the
s
ector
is
protected or
u
nprotected
.
By
issui
ng the DYB Wr
i
te comm
a
nd
s
e
qu
ence
s
, the
DYB
s
w
i
ll
b
e
s
et or cle
a
red, th
us
pl
a
c
i
ng e
a
ch
s
ector
i
n the protected or
u
nprotected
s
t
a
te
.
The
s
e
a
re the
s
o-c
a
lled
Dynam
i
c Locked or Unlocked
s
t
a
te
s.
They
a
re c
a
lled dyn
a
m
i
c
s
t
a
te
s
b
ec
aus
e
i
t
is
very e
as
y to
s
w
i
tch
ba
ck
a
nd forth
b
etween the protected
a
nd
u
n-
protected cond
i
t
i
on
Th
is
a
llow
s
s
oftw
a
re to e
asi
ly
protect
s
ector
s
a
g
ai
n
s
t
i
n
a
dvertent ch
a
nge
s
yet doe
s
not prevent the e
as
y remov
a
l of protect
i
on when
ch
a
nge
s
a
re needed
.
The DYB
s
m
a
y
b
e
s
et or cle
a
red
as
often
as
needed
.
The PPB
s
a
llow for
a
more
s
t
a
t
i
c,
a
nd d
i
ff
i
c
u
lt to
ch
a
nge, level of protect
i
on
.
The PPB
s
ret
ai
n the
i
r
s
t
a
te
a
cro
ss
power cycle
s
b
ec
aus
e they
a
re Non-Vol
a
t
i
le
.
Ind
i
v
i
d
ua
l PPB
s
a
re
s
et w
i
th
a
comm
a
nd
bu
t m
us
t
a
ll
b
e cle
a
red
as
a
gro
u
p thro
u
gh
a
complex
s
e
qu
ence of
progr
a
m
a
nd er
asi
ng comm
a
nd
s.
The PPB
s
a
re l
i
m-
i
ted to 100 er
as
e cycle
s.
The PPB Lock
bi
t
a
dd
s
a
n
a
dd
i
t
i
on
a
l level of protec-
t
i
on
.
Once
a
ll PPB
s
a
re progr
a
mmed to the de
si
red
s
ett
i
ng
s
, the PPB Lock m
a
y
b
e
s
et to “1”
.
S
ett
i
ng the
PPB Lock d
isab
le
s
a
ll progr
a
m
a
nd er
as
e comm
a
nd
s
to the Non-Vol
a
t
i
le PPB
s.
In effect, the PPB Lock B
i
t
lock
s
the PPB
s
nto the
i
r c
u
rrent
s
t
a
te
.
The only w
a
y to
cle
a
r the PPB Lock
is
to go thro
u
gh
a
power cycle
.
S
y
s
tem
b
oot code c
a
n determ
i
ne
i
f
a
ny ch
a
nge
s
to the
PPB
a
re needed e
.
g
.
to
a
llow new
s
y
s
tem code to
b
e
downlo
a
ded
.
If no ch
a
nge
s
a
re needed then the
b
oot
code c
a
n
s
et the PPB Lock to d
isab
le
a
ny f
u
rther
ch
a
nge
s
to the PPB
s
d
u
r
i
ng
s
y
s
tem oper
a
t
i
on
.
The WP# wr
i
te protect p
i
n
a
dd
s
a
f
i
n
a
l level of h
a
rd-
w
a
re protect
i
on to the two o
u
termo
s
t
8
K
b
yte
s
s
ector
s
i
n the 75
%
ba
nk
.
When th
is
p
i
n
is
low
i
t
is
not po
ssib
le
to ch
a
nge the content
s
of the
s
e two
s
ector
s.
It
is
po
ssib
le to h
a
ve
s
ector
s
th
a
t h
a
ve
b
een per
sis
-
tently locked,
a
nd
s
ector
s
th
a
t
a
re left
i
n the dyn
a
m
i
c
s
t
a
te
.
The
s
ector
s
i
n the dyn
a
m
i
c
s
t
a
te
a
re
a
ll
u
npro-
tected
.
If there
is
a
need to protect
s
ome of them,
a
si
mple DYB Wr
i
te comm
a
nd
s
e
qu
ence
is
a
ll th
a
t
is
nece
ssa
ry
.
The DYB wr
i
te comm
a
nd for the dyn
a
m
i
c
s
ector
s
s
w
i
tch the DYB
s
to
si
gn
i
fy protected
a
nd
u
n-
protected, re
s
pect
i
vely
.
If there
is
a
need to ch
a
nge
the
s
t
a
t
us
of the per
sis
tently locked
s
ector
s
,
a
few
more
s
tep
s
a
re re
qui
red
.
F
i
r
s
t, the PPB Lock
bi
t m
us
t
b
e d
isab
led
b
y e
i
ther p
u
tt
i
ng the dev
i
ce thro
u
gh
a
power-cycle, or h
a
rdw
a
re re
s
et
.
The PPB
s
c
a
n then
b
e ch
a
nged to reflect the de
si
red
s
ett
i
ng
s.
S
ett
i
ng the
PPB lock
bi
t once
a
g
ai
n w
i
ll lock the PPB
s
,
a
nd the
dev
i
ce oper
a
te
s
norm
a
lly
a
g
ai
n
.
Note
:
to
a
ch
i
eve the
b
e
s
t protect
i
on,
i
t’
s
recommended
to exec
u
te the PPB lock
bi
t
s
et comm
a
nd e
a
rly
i
n the
b
oot code,
a
nd protect the
b
oot code
b
y hold
i
ng WP#
= V
IL
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29BDD160GB20DKE | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB20DKF | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB20DKI | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB20DKK | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB20DPBE | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
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