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參數(shù)資料
| 型號： | AM29BDD160GB20APBE |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| 中文描述： | 16兆位（1 M中的x 16-bit/512畝× 32位），2.5伏的CMOS只突發(fā)模式，雙啟動，同步讀/寫閃存 |
| 文件頁數(shù)： | 19/79頁 |
| 文件大?。?/td> | 1368K |
| 代理商： | AM29BDD160GB20APBE |
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June 7, 2006
Am29BDD160G
17
S
ynchronou
s
(Bur
s
t) Read Operat
i
on
The Am2
9
BDD160
is
c
a
p
ab
le of perform
i
ng
bu
r
s
t re
a
d
oper
a
t
i
on
s
to
i
mprove tot
a
l
s
y
s
tem d
a
t
a
thro
u
ghp
u
t
.
The dev
i
ce
is
a
v
ai
l
ab
le
i
n three
bu
r
s
t mode
s
of oper
a
-
t
i
on
:
l
i
ne
a
r
a
nd
bu
r
s
t mode
.
2, 4
a
nd
8
do
ub
le word
(x
3
2)
a
nd 4
a
nd
8
word (x16)
a
cce
ss
e
s
a
re conf
i
g-
u
r
ab
le
as
e
i
ther
s
e
qu
ent
ia
l
bu
r
s
t
a
cce
ss
e
s.
16
a
nd
3
2
word (x16)
a
cce
ss
e
s
a
re only conf
i
g
u
r
ab
le
as
l
i
ne
a
r
bu
r
s
t
a
cce
ss
e
s.
Add
i
t
i
on
a
l opt
i
on
s
for
a
ll
bu
r
s
t mode
s
i
ncl
u
de
i
n
i
t
ia
l
a
cce
ss
del
a
y conf
i
g
u
r
a
t
i
on
s
(2–16
CLK
s
) Dev
i
ce conf
i
g
u
r
a
t
i
on for
bu
r
s
t mode oper
a
t
i
on
is
a
ccompl
is
hed
b
y wr
i
t
i
ng the Conf
i
g
u
r
a
t
i
on Reg
is
ter
w
i
th the de
si
red
bu
r
s
t conf
i
g
u
r
a
t
i
on
i
nform
a
t
i
on
.
Once
the Conf
i
g
u
r
a
t
i
on Reg
is
ter
is
wr
i
tten to en
ab
le
bu
r
s
t
mode oper
a
t
i
on,
a
ll
subs
e
qu
ent re
a
d
s
from the
a
rr
a
y
a
re ret
u
rned
usi
ng the
bu
r
s
t mode protocol
s.
L
i
ke the
m
ai
n memory
a
cce
ss
, the
S
ec
Si
S
ector memory
is
a
c-
ce
ss
ed w
i
th the
sa
me
bu
r
s
t or
as
ynchrono
us
t
i
m
i
ng
as
def
i
ned
i
n the Conf
i
g
u
r
a
t
i
on Reg
is
ter
.
However, the
us
er m
us
t recogn
i
ze th
a
t cont
i
n
u
o
us
bu
r
s
t oper
a
t
i
on
s
p
as
t the 256
b
yte
S
ec
Si
b
o
u
nd
a
ry ret
u
rn
s
i
nv
a
l
i
d d
a
t
a.
B
u
r
s
t re
a
d oper
a
t
i
on
s
occ
u
r only to the m
ai
n fl
as
h
memory
a
rr
a
y
s.
The Conf
i
g
u
r
a
t
i
on Reg
is
ter
a
nd pro-
tect
i
on
bi
t
s
a
re tre
a
ted
as
si
ngle cycle re
a
d
s
, even
when
bu
r
s
t mode
is
en
ab
led
.
Re
a
d oper
a
t
i
on
s
to
the
s
e loc
a
t
i
on
s
re
su
lt
s
i
n the d
a
t
a
rem
ai
n
i
ng v
a
l
i
d
wh
i
le OE#
is
a
t V
IL
, reg
a
rdle
ss
of the n
u
m
b
er of CLK
cycle
s
a
ppl
i
ed to the dev
i
ce
.
L
i
near Bur
s
t Read Operat
i
on
s
L
i
ne
a
r
bu
r
s
t re
a
d mode re
a
d
s
e
i
ther 4,
8
, 16, or
3
2
word
s
(1 word = 16
bi
t
s
), depend
i
ng
u
pon the Conf
i
g
u
-
r
a
t
i
on Reg
is
ter opt
i
on
.
If the dev
i
ce
is
conf
i
g
u
red w
i
th
a
3
2
bi
t
i
nterf
a
ce (WORD# = V
IH
), the
bu
r
s
t
a
cce
ss
is
compr
is
ed of 4 clocked re
a
d
s
for
8
word
s
a
nd 16
clocked re
a
d
s
for
3
2 word
s
(
S
ee T
ab
le 6 for
a
ll v
a
l
i
d
bu
r
s
t o
u
tp
u
t
s
e
qu
ence
s
)
.
The n
u
m
b
er of clocked
re
a
d
s
is
do
ub
led when the dev
i
ce
is
conf
i
g
u
red
i
n the
16-
bi
t d
a
t
a
bus
mode (WORD# = V
IL
)
.
The IND/WAIT#
p
i
n tr
a
n
si
t
i
on
s
a
ct
i
ve (V
IL
) d
u
r
i
ng the l
as
t tr
a
n
s
fer of
d
a
t
a
d
u
r
i
ng
a
l
i
ne
a
r
bu
r
s
t re
a
d
b
efore
a
wr
a
p
a
ro
u
nd,
i
nd
i
c
a
t
i
ng th
a
t the
s
y
s
tem
s
ho
u
ld
i
n
i
t
ia
te
a
nother
ADV# to
s
t
a
rt the next
bu
r
s
t
a
cce
ss.
If the
s
y
s
tem con-
t
i
n
u
e
s
to clock the dev
i
ce, the next
a
cce
ss
wr
a
p
s
a
ro
u
nd to the
s
t
a
rt
i
ng
a
ddre
ss
of the prev
i
o
us
bu
r
s
t
a
cce
ss.
The IND/WAIT#
si
gn
a
l rem
ai
n
s
i
n
a
ct
i
ve (flo
a
t-
i
ng) when not
a
ct
i
ve
.
S
ee T
ab
le 6 for
a
complete
3
2
a
nd 16
bi
t d
a
t
a
bus
i
nterf
a
ce order
.
16
a
nd
3
2 word
opt
i
on
s
a
re re
s
tr
i
cted to
s
e
qu
ent
ia
l
bu
r
s
t
a
cce
ss
e
s
,
only
.
Table 6
.
16-B
i
t and
3
2-B
i
t L
i
near and Bur
s
t Data Order
Data Tran
s
fer
S
equence
(Independent of the WORD#
p
i
n)
Output Data
S
equence (In
i
t
i
al Acce
ss
Addre
ss
)
(x16)
Two L
i
ne
a
r D
a
t
a
Tr
a
n
s
fer
s
,
(x
3
2 only)
0-1 (A0 = 0)
1-0 (A0 = 1)
Fo
u
r L
i
ne
a
r D
a
t
a
Tr
a
n
s
fer
s
0-1-2-
3
(A0
:
A-1/A1-A0 = 00)
1-2-
3
-0 (A0
:
A-1/A1-A0 = 01)
2-
3
-0-1 (A
:
A-1/A1-A0 = 10)
3
-0-1-2 (A0
:
A-1/A1-A0 = 11)
E
i
ght L
i
ne
a
r D
a
t
a
Tr
a
n
s
fer
s
0-1-2-
3
-4-5-6-7 (A1
:
A-1A2-A0 = 000)
1-2-
3
-4-5-6-7-0 (A1
:
A-1/A2-A0 = 001)
2-
3
-4-5-6-7-0-1 (A1
:
A-1/A2-A0 = 010)
3
-4-5-6-7-0-1-2 (A1
:
A-1/A2-A0 = 011)
4-5-6-7-0-1-2-
3
(A1
:
A-1/A2-A0 = 100)
5-6-7-0-1-2-
3
-4 (A1
:
A-1/A2-A0 = 101)
6-7-0-1-2-
3
-4-5 (A1
:
A-1/A2-A0 = 110)
7-0-1-2-
3
-4-5-6 (A1
:
A-1/A2-A0 = 111)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29BDD160GB20APBF | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB20APBI | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB20APBK | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB20CKE | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
| AM29BDD160GB20CKF | 16 Megabit (1 M x 16-bit/512 K x 32-Bit), CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory |
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