• 參數(shù)資料
    型號: AM28F020-200JI
    廠商: ADVANCED MICRO DEVICES INC
    元件分類: PROM
    英文描述: 2 Megabit (256 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory
    中文描述: 256K X 8 FLASH 12V PROM, 200 ns, PQCC32
    封裝: PLASTIC, LCC-32
    文件頁數(shù): 1/35頁
    文件大?。?/td> 509K
    代理商: AM28F020-200JI
    FINAL
    Publication#
    14727
    Issue Date:
    January 1998
    Rev:
    F
    Amendment/
    +2
    Am28F020
    2 Megabit (256 K x 8-Bit)
    CMOS 12.0 Volt, Bulk Erase Flash Memory
    DISTINCTIVE CHARACTERISTICS
    I
    High performance
    — Access times as fast as 70 ns
    I
    CMOS low power consumption
    — 30 mA maximum active current
    — 100 μA maximum standby current
    — No data retention power consumption
    I
    Compatible with JEDEC-standard byte-wide
    32-pin EPROM pinouts
    — 32-pin PDIP
    — 32-pin PLCC
    — 32-pin TSOP
    I
    10,000 write/erase cycles minimum
    I
    Write and erase voltage 12.0 V
    ±
    5%
    I
    Latch-up protected to 100 mA from
    –1 V to V
    CC
    +1 V
    I
    Flasherase Electrical Bulk Chip Erase
    — One second typical chip erase time
    I
    Flashrite Programming
    — 10 μs typical byte program time
    — 4 s typical chip program time
    I
    Command register architecture for
    microprocessor/microcontroller compatible
    write interface
    I
    On-chip address and data latches
    I
    Advanced CMOS flash memory technology
    — Low cost single transistor memory cell
    I
    Automatic write/erase pulse stop timer
    GENERAL DESCRIPTION
    The Am28F020 is a 2 Megabit Flash memory orga-
    nized as 256 Kbytes of 8 bits each. AMD’s Flash mem-
    ories offer the most cost-effective and reliable read/
    write non-volatile random access memory. The
    Am28F020 is packaged in 32-pin PDIP, PLCC, and
    TSOP versions. It is designed to be reprogrammed and
    erased in-system or in standard EPROM programmers.
    The Am28F020 is erased when shipped from
    the factory.
    The standard Am28F020 offers access times of as fast
    as 70 ns, allowing high speed microprocessors to
    operate without wait states. To eliminate bus conten-
    tion, the device has separate chip enable (CE#) and
    output enable (OE#) controls.
    AMD’s Flash memories augment EPROM functionality
    with in-circuit electrical erasure and programming. The
    Am28F020 uses a command register to manage this
    functionality, while maintaining a JEDEC-standard 32-
    pin pinout. The command register allows for 100% TTL
    level control inputs and fixed power supply levels during
    erase and programming, while maintaining maximum
    EPROM compatibility.
    AMD’s Flash technology reliably stores memory con-
    tents even after 10,000 erase and program cycles. The
    AMD cell is designed to optimize the erase and pro-
    gramming mechanisms. In addition, the combination of
    advanced tunnel oxide processing and low internal
    electric fields for erase and programming operations
    produces reliable cycling. The Am28F020 uses a
    12.0
    ±
    5% V
    PP
    supply input to perform the Flasherase
    and Flashrite functions.
    The highest degree of latch-up protection is achieved
    with AMD’s proprietary non-epi process. Latch-up pro-
    tection is provided for stresses up to 100 mA on
    address and data pins from –1 V to V
    CC
    +1 V.
    The Am28F020 is byte programmable using 10 μs
    programming pulses in accordance with AMD’s
    Flashrite programming algorithm. The typical room
    temperature programming time of the Am28F020 is
    four seconds. The entire chip is bulk erased using 10
    ms erase pulses according to AMD’s Flasherase
    algorithm. Typical erasure at room temperature is
    accomplished in less than one second. The windowed
    package and the 15–20 minutes required for EPROM
    erasure using ultraviolet light are eliminated.
    Commands are written to the command register using
    standard microprocessor write timings. Register con-
    tents serve as input to an internal state-machine, which
    controls the erase and programming circuitry. During
    write cycles, the command register internally latches
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