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參數(shù)資料
| 型號： | ALD500ASWCL |
| 廠商： | Advanced Linear Devices Inc |
| 文件頁數(shù)： | 4/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 17BIT DUAL 16WSOIC |
| 標(biāo)準(zhǔn)包裝： | 46 |
| 位數(shù)： | 17 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 10mW |
| 電壓電源： | 雙 ± |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | * |
2
Advanced Linear Devices
ALD500AU/ALD500A/ALD500
GENERAL THEORY OF OPERATION
Dual-Slope Conversion Principles of Operation
The basic principle of dual-slope integrating analog to digital
converter is simple and straightforward. A capacitor, CINT, is
charged with the integrator from a starting voltage, VX, for a
fixed period of time at a rate determined by the value of an
unknown input voltage, which is the subject of measurement.
Then the capacitor is discharged at a fixed rate, based on an
external reference voltage, back to VX where the discharge
time, or deintegration time, is measured precisely. Both the
integration time and deintegration time are measured by a
digital counter controlled by a crystal oscillator. It can be
demonstrated that the unknown input voltage is determined
by the ratio of the deintegration time and integration time, and
is directly proportional to the magnitude of the external reference
voltage.
The major advantages of a dual-slope converter are:
a. Accuracy is not dependent on absolute values of
integration time tINT and deintegration time tDINT, but is
dependent on their relative ratios. Long-term clock frequency
variations will not affect the accuracy. A standard crystal
controlled clock running digital counters is adequate to generate
very high accuracies.
b. Accuracy is not dependent on the absolute values of
RINT and CINT. as long as the component values do not vary
through a conversion cycle, which typically lasts less than 1
second.
c. Offset voltage values of the analog components, such
as VX, are cancelled out and do not affect accuracy.
d. Accuracy of the system depends mainly on the accuracy
and the stability of the voltage reference value.
e. Very high resolution, high accuracy measurements
can be achieved simply and at very low cost.
An inherent benefit of the dual slope converter system is noise
immunity. The input noise spikes are integrated (averaged to
near zero) during the integration periods. Integrating ADCs
are immune to the large conversion errors that plague
successive approximation converters and other high resolution
converters and perform very well in high-noise environments.
The slow conversion speed of the integrating converter provides
inherent noise rejection with at least a 20dB/decade attenuation
rate. Interference signals with frequencies at integral multiples
of the integration period are, theoretically, completely removed.
Integrating converters often establish the integration period to
reject 50/60Hz line frequency interference signals.
The relationship of the integrate and deintegrate (charge
and discharge) of the integrating capacitor values are
shown below:
VINT = VX - (VIN . tINT / RINT . CINT)
FIGURE 1. ALD 500 Functional Block Diagram
SW-R
-
+
-
+
-
+
-
(1)
(14)
(15)
COUT
DGND
Level
Shift
Polarity
Detection
Phase
Decoding
Logic
Comp2
Comp1
Integrator
Buffer
Analog
Switch
Control
Signals
Control Logic
A
B
AGND
(10)
(5)
(11)
(7)
(9)
(8)
(6)
(4)
(2)
(16)
(13)
(12)
VDD
VSS
CINT
RINT
CAZ
C-REF
SWAZ
SWS
SWR
CREF
SWAz
SWIN
SWG
SWIN
C+REF
V+REF V-REF
SW-R
SW+R
V-IN
V+IN
BUF
(3)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ALD500AU | 制造商:ALD 制造商全稱:Advanced Linear Devices 功能描述:PRECISION INTEGRATING ANALOG PROCESSOR |
| ALD500AUPC | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 18 Bit A/D Processor RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ALD500AUPCL | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 18 Bit A/D Processor RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ALD500AUSC | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 18 Bit A/D Processor RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ALD500AUSCL | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 18 Bit A/D Processor RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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