參數(shù)資料
型號(hào): AL128
廠商: Electronic Theatre Controls, Inc.
元件分類: 圓形連接器
英文描述: Circular Connector; No. of Contacts:55; Series:MS27497; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:22; Circular Contact Gender:Socket; Circular Shell Style:Wall Mount Receptacle RoHS Compliant: No
中文描述: 即插即用VGA到的NTSC / PAL制式轉(zhuǎn)換器
文件頁(yè)數(shù): 33/45頁(yè)
文件大?。?/td> 498K
代理商: AL128
AL128
April 2, 1999
33
N is defined at reg.#72h<5:0>
M is defined at reg.#71h<5:0>
0: Hardware default vertical scale ratio used for vertical
scaling.
1: Software vertical down-scale ratio CapVRatio used.
Reserved
bit 1,0 of 10-bit GinVStartDlt. Used with Reg 0x22
CapVRatioEn
<4>
<5>
<7:6>
GinVStartDlt
The relationship between registers #24h, #25h and #26h is that Reg. #25h<6:0>
approximately equals to Reg. #24h<6:0> * (Vertical scale ratio define in Reg. #26h)
Please also refer to Section 6.3 Video Timing for better understanding
27h:
Horizontal Scale Ratio [DSPHRATIO] (R/W)
DspHRatio
<5:0>
Software horizontal scale ratio.
The value is ((HSRC/HDST) x 256 – 128) / 2
HSRC is horizontal capture size defined in reg. #23h
HDST is horizontal display active size.
The default overscan HDST for NTSC is 752; PAL is 954
The default underscan HDST for NTSC is 656; PAL is 800
The pixel total for 910x525 for NTSC, 1126x615 for PAL
The suggested HDST in zoom mode is 736~836 (NTSC)
and 800~1203 (PAL). Please review the S.5.2 and S.5.3
sections of the AL128 Application Notes (and find the DspH
value in different input modes) for details
0: Use default hardware horizontal scale ratio.
1: Use DspHRatio and SoftNoScale to control horizontal
scale ratio.
turned on when horizontal scaling ratio is 1:1.
Don’t care if
bit<6> = 0.
The AL100 series perform horizontal up-scaling only. For down-scaling, reduce capture
size instead by programming Reg.#28h.
The destination total displayed active pixels is defined as:
Reg#23h<6:0> * 16 * (HDST/HSRC)
Please also refer to Section 6.3 Video Timing for better understanding.
HscaleEn
<6>
SoftNoScale
<7>
28h:
Graphic Clock PLL Divider (R/W) [PLLDIVIDER]
PllDiv
<6:0>
PllDivEn
<7>
PLL divider number (Unit: 16 pixels)
PLL divide number enable
0
Use default hardware divider value.
1
Use PllDiv registers for the PLL divider number.
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