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參數(shù)資料
| 型號(hào)： | AKD5353 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | EVALUATION BOARD REV.B FOR AK5353 |
| 中文描述： | 評(píng)價(jià)委員會(huì)REV.B的AK5353 |
| 文件頁(yè)數(shù)： | 3/17頁(yè) |
| 文件大?。?/td> | 214K |
| 代理商： | AKD5353 |
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ASAHI KASEI
[AKD5353]
<KM060503>
’99/11
- 3 -
3) All interface signals (MCLK,SCLK,LRCK) are fed from the external circuit through PORT2
PORT2 (DAC/ROM) is used. JP5,7 and 9 should be open. Selection of JP6 is no care but should not be open.
JP4
JP5
JP6
XTE
CLK
MCLK
JP7
SCLK
XTL
BNC
512FS
256FS
32FS
64FS
128FS
JP9
LRCK
n
Other jumper pins set up
[JP1](VD): VD of AK5353
3V: independent of VA <default>
VA: same as VA (The connector “3V” should be open.)
[JP2](DGND-AGND): Analog ground and digital ground
open:
separated <default>
short:
common (The connector “DGND” can be open.)
[JP3](5V-3V): VD of AK5353 and power supply to logic
open:
independent <default>
short:
same (The connector “3V” should be open.)
[JP8](8402_DIF): Always “MSB”
n
The function of the toggle SW.
Upper-side is “H” and lower-side is “L”.
[SW2]: Resets the CS8402. Keep “H” during normal operation.
[SW4]: Resets the AK5353. Keep “H” during normal operation.
n
DIP switch set up.
[SW3]: Sets the mode of AK5353.
No.
1
2
Pin
DIF
TTL
ON
I2S
OFF (default)
MSB justified
CMOS interface
TTL interface
Table 1. DIP switch set-up of AK5353
JP1
VD
3V
VA
JP2
DGND
AGND
JP3
5V
3V
JP8
8402_DIF
MSB
I2S
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| AKD5354 | EVALUATION BOARD REV.A FOR AK5354 |
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相關(guān)代理商/技術(shù)參數(shù) |
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| AKD5354 | 制造商:AKM 制造商全稱:AKM 功能描述:LOW POWER 20 BIT ADC WITH PGA |
| AKD5354(AKD5354) | 制造商:AKM 制造商全稱:AKM 功能描述:Evaluation board Rev.A for AK5354 |
| AKD5354.(AKD5354) | 制造商:AKM 制造商全稱:AKM 功能描述:Evaluation board Rev.A for AK5354 |
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