
ASAHI KASEI [AK4532]
0178-E-01 10 1999/06
OPERATION OVERVIW
1. CONTROL REGISTER MAP
Addr
Register Name
00
Master Volume Lch
01
Master Volume Rch
02
Voice Volume Lch
03
Voice Volume Rch
08
Line Volume Lch
09
Line Volume Rch
0A
AUX Volume Lch
0B
AUX Volume Rch
10
Output Mixer SW 1
11
Output Mixer SW 2
12
Lch Input Mixer SW 1
13
Rch Input Mixer SW 1
14
Lch Input Mixer SW 2
15
Rch Input Mixer SW 2
16
Reset and Power Down
19
MIC Amp Gain
Note: ATT* is data bits for the attenuation level.
GAI* is data bits for the gain level.
D7
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
D6
D5
D4
ATT4
ATT4
GAI4
GAI4
GAI4
GAI4
GAI4
GAI4
LineL
AUXR
LineL
LineL
AUXL
AUXL
D3
ATT3
ATT3
GAI3
GAI3
GAI3
GAI3
GAI3
GAI3
LineR
VoiceL
LineR
LineR
AUXR
AUXR
D2
ATT2
ATT2
GAI2
GAI2
GAI2
GAI2
GAI2
GAI2
D1
ATT1
ATT1
GAI1
GAI1
GAI1
GAI1
GAI1
GAI1
D0
ATT0
ATT0
GAI0
GAI0
GAI0
GAI0
GAI0
GAI0
MIC
AUXL
VoiceR
VoiceL
VoiceR
PD
RST
MGAIN
IMPORTANT: There is the compatibility between the AK4531 and AK4532. But the input mixer
functions of those device has some different implication in the application, receptively.
And the other address of control register except those described in the above table and “1A” are
“do not care”. Address “1A” for testing shall be strictly prohibited to access.
Be ware that the three MSB address bits(A7, A6, A5) are ignored by AK4532. Writing to address
“20” register will update the address “00” register for instance.
2. WRITE Timing of Control Register
CS
CCLK
1
A7-A0:
D7-D0:
Address
Control Data
3
4
5
6
7
9
10
11
12
13
14
15
2
8
CDATA
D0
D1
D2
D3
D4
D5
D6
A0
A1
A2
A3
A4
A6
A7
A5
D7
0
3. Control Register Definitions
Addr
00
01
Register Name
Master Volume Lch
Master Volume Rch
D7
MUTE
MUTE
D6
D5
D4
ATT4
ATT4
D3
ATT3
ATT3
D2
ATT2
ATT2
D1
ATT1
ATT1
D0
ATT0
ATT0
MUTE
1:
0:
MUTE
No MUTE
32 levels with 2 dB step
00000: 0dB
11111: -62 dB
ATT4:0
Initial “0000 0000”(No MUTE & 0dB)