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參數(shù)資料
| 型號： | AK6012A |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | I2C bus 32K / 64Kbit Serial CMOS EEPROM |
| 中文描述： | I2C總線32K的/ 64Kbit串行CMOS EEPROM的 |
| 文件頁數(shù)： | 4/15頁 |
| 文件大小： | 172K |
| 代理商： | AK6012A |
ASAHI KASEI
[AK6010A/12A]
DAI02E-03
2002/11
- 4 -
[ACKNOWLEDGE]
ACKNOWLEDGE is a software convention used to indicate successful data transfers. The
transmitting device will release the bus after transmitting eight bits. During the next clock (ninth
clock), the receiver will pull the SDA line to LOW to acknowledge that it received the eight bits of
data.
The AK6010A/12A will respond with an acknowledge after recognition of a start condition and its
slave address. If both the device and a write operation have been selected, the AK6010A/12A will
respond with an acknowledge after the receipt of each subsequent eight bit word.
In the read mode the AK6010A/12A slave will transmit eight bits of data, release the SDA line and
monitor the line for an acknowledge. If an acknowledge is detected and no STOP condition is
generated by the master, the slave will continue to transmit data. If an acknowledge is not
detected, the slave will terminate further data transmissions and await the STOP condition to return
to the standby power mode.
Figure 3. Acknowledge Response from Receiver
[SLAVE ADDRESS]
After the START condition, a SLAVE ADDRESS is sent. If the transmitted slave address matches
an address of one of the device, the designated slave pulls the SDA line to LOW.
The most significant four bits of the slave address are fixed as "1010". The next three bits are S0,
S1 and S2 device address bits. These three bits identify the specific device on the bus. They is
set by the hard wired input pins (S0 pin, S1 pin and S2 pin). Therefore a total of eight devices can
be connected to the same bus.
The last bit of the slave address (R/W bit) defines whether a write or read condition is requested by
the master. A "1" indicates that the read operation is to be executed. A "0" indicates that the write
operation is to be executed.
Figure 4. Slave Address
1
They is set by the hard-wired input pins (S0 pin, S1 pin and S2 pin).
DEVICE ADDRESS
0
1
0
S2
S1
S0
R/W
DATA
OUTPUT
FROM
TRANSMITTER
DATA
OUTPUT
FROM
RECEIVER
ACKNOWLEDGE
SCL FROM
MASTER
1
8
9
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