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參數(shù)資料
| 型號： | AK5383VS |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | Enhanced Dual bit 96 kHz 24-bit ADC |
| 中文描述： | 增強(qiáng)雙位96 kHz的24位ADC |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 123K |
| 代理商： | AK5383VS |
ASAHI KASEI
[AK5383]
M0049-E-03
2000/4
- 3 -
PIN/FUNCTION
No.
1
Pin Name
VREFL
I/O
O
Function
Lch Reference Voltage Pin, 3.75V
Normally connected to GNDL with a 10μF electrolytic capacitor and
a 0.1μF ceramic capacitor.
Lch Reference Ground Pin, 0V
2
GNDL
-
3
4
5
6
VCOML
AINL+
AINL-
ZCAL
O
I
I
I
Lch Common Voltage Pin, 2.75V
Lch Analog positive input Pin
Lch Analog negative input Pin
Zero Calibration Control Pin
This pin controls the calibration reference signal.
"L": VCOML and VCOMR
"H": Analog Input Pins (AINL
±
, AINR
±
)
Digital Power Supply Pin, 3.3V
7
VD
-
8
9
DGND
CAL
-
Digital Ground Pin, 0V
Calibration Active Signal Pin
"H" means the offset calibration cycle is in progress. Offset calibration starts
when RST goes "H". CAL goes "L" after 8704 LRCK cycles for DFS="L",
17408 LRCK cycles for DFS ="H".
Reset Pin
When "L", Digital section is powered-down. Upon returning "H", an
offset calibration cycle is started. An offset calibration cycle should always
be initiated after power-up.
Serial Interface Mode Select Pin
MSB first, 2's compliment.
SMODE2 SMODE1 MODE LRCK
L L Slave mode : MSB justified : H/L
L H Master mode : Similar to I
2
S : H/L
H L Slave mode : I
2
S : L/H
H H Master mode : I
2
S : L/H
Left/Right Channel Select Clock Pin
LRCK goes "H" at SMODE2="L" and "L" at SMODE2="H" during reset
when SMODE1 "H".
O
10
RST
I
11
12
SMODE2
SMODE1
I
I
13
LRCK
I/O
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|---|---|
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| AK5384VFP-E2 | 功能描述:IC ADC AUDIO STER 24BIT 28VSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Basics 標(biāo)準(zhǔn)包裝:1 系列:- 類型:電機(jī)控制 分辨率（位）:12 b 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，并聯(lián) 電壓電源:單電源 電源電壓:2.7 V ~ 3.6 V，4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:100-TQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x14） 包裝:剪切帶 (CT) 其它名稱:296-18373-1 |
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