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參數(shù)資料
| 型號： | AK5380VT |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 96kHz 24Bit ADC with Single - ended Input |
| 中文描述： | 96kHz的24位ADC的單-端輸入 |
| 文件頁數(shù)： | 3/17頁 |
| 文件大小： | 148K |
| 代理商： | AK5380VT |
ASAHI KASEI
[AK5380]
MS0100-E-01
2001/7
- 3 -
PIN/FUNCTION
No.
1
2
3
Pin Name
AINR
AINL
NC
I/O
I
I
-
Description
Rch Analog Input Pin
Lch Analog Input Pin
NC Pin
No internal bonding.
Common Voltage Output Pin
Normally connected to AGND with a 0.1
μ
F ceramic capacitor in parallel with an
electrolytic capacitor less than 2.2
μ
F.
Analog Ground Pin, 0V
Analog Power Supply Pin, +4.5
～
+5.5V
Digital Power Supply Pin, +2.7
～
+5.5V(fs=48kHz), +4.5
～
+5.5V(fs=96kHz)
Digital Ground Pin, 0V
Serial Data Output Pin
Data bits are presented MSB first, in 2’s complement format.
This pin is “L” in the power-down mode.
Left/Right Channel Select Pin
The fs clock is input to this pin.
Master Clock Input Pin
Serial Data Input Pin
Output data is clocked out on the falling edge of SCLK.
Power-Down Pin
When “L”, the circuit is in power-down mode.
The AK5380 should always be reset upon power-up.
Serial Interface Format Pin
“L”: MSB justified, “H”: I
2
S
Digital Input Level Select Pin
“L”: CMOS level (VD=2.7
～
5.5V), “H”: TTL level (VD=4.5
～
5.5V)
Test Pin (Internal pull-down pin)
This pin should be left open.
4
VCOM
O
5
6
7
8
9
AGND
VA
VD
DGND
SDTO
-
-
-
-
O
10
LRCK
I
11
12
MCLK
SCLK
I
I
13
PDN
I
14
DIF
I
15
TTL
I
16
TST
I
Note: All input pins except pull-down pins should not be left floating.
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PDF描述 |
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| AK5381ET | 24Bit 96kHz ツヒ ADC |
| AK5381VT | 24Bit 96kHz ツヒ ADC |
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| AK5383VF | Enhanced Dual bit 96 kHz 24-bit ADC |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK5380VTP-E2 | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述: |
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| AK5381ETP-E2 | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述: |
| AK5381VT | 制造商:AKM 制造商全稱:AKM 功能描述:24Bit 96kHz ツヒ ADC |
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