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參數(shù)資料
| 型號： | AK5380 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 96kHz 24Bit ADC with Single - ended Input |
| 中文描述： | 96kHz的24位ADC的單-端輸入 |
| 文件頁數(shù)： | 11/17頁 |
| 文件大?。?/td> | 148K |
| 代理商： | AK5380 |
ASAHI KASEI
[AK5380]
MS0100-E-01
2001/7
- 11 -
OPERATION OVERVIEW
n
System Clock Input
The external clocks which are required to operate the AK5380 are MCLK(256fs/384fs/512fs/768fs), LRCK(1fs), SCLK.
MCLK should be synchronized with LRCK but the phase is not critical. When 384fs, 512fs or 768fs clock is input to
MCLK pin, the internal master clock becomes 256fs(=384fs x 2/3=512fs x 1/2=768fs x 1/3). Table 1 illustrates standard
audio word rates and corresponding frequencies used in the AK5380.
All external clocks (MCLK,BICK,LRCK) should always be present whenever the AK5380 is in normal operation mode
(PDN = “H”). If these clocks are not provided, the AK5380 may draw excess current and may not possibly operate
properly because the device utilizes dynamic refreshed logic internally. If the external clocks are not present, the AK5380
should be in the power-down mode (PDN = “L”). After exiting reset at power-up etc., the AK5380 is in the power-down
mode until MCLK and LRCK are input.
MCLK
SCLK
fs
256fs
384fs
512fs
768fs
64fs
128fs
32.0kHz
44.1kHz
48.0kHz
96.0kHz
8.1920MHz
11.2896MHz
12.2880MHz
24.5760MHz
12.2880MHz
16.9344MHz
18.4320MHz
36.8640MHz
16.3840MHz
22.5792MHz
24.5760MHz
N/A
24.576MHz
33.8688MHz
36.8640MHz
N/A
2.0480MHz
2.8224MHz
3.0720MHz
6.1440MHz
4.0960MHz
5.6448MHz
6.1440MHz
N/A
Table 1. Example of System Clock
n
Serial Data Interface
Two kinds of data format can be selected by DIF pin. The data is clocked out via the SDTO pin by SCLK corresponding
to the setting of DIF pin. The format of output data is 2’s complement MSB first.
Mode
0
1
DIF
0
1
Format
24bit, MSB justified, L/R, SCLK
≥
48fs (16bit, MSB justified, L/R, SCLK=32fs)
24bit, I2S, SCLK
≥
48fs (16bit, I2S, SCLK=32fs)
Table 2. Audio Serial Interface Formats
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK5380VT | 96kHz 24Bit ADC with Single - ended Input |
| AK5381ET | 24Bit 96kHz ツヒ ADC |
| AK5381VT | 24Bit 96kHz ツヒ ADC |
| AK5383 | Circular Connector; No. of Contacts:8; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:16-8 RoHS Compliant: No |
| AK5383VF | Enhanced Dual bit 96 kHz 24-bit ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK5380VT | 制造商:AKM 制造商全稱:AKM 功能描述:96kHz 24Bit ADC with Single - ended Input |
| AK5380VTP-E2 | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述: |
| AK5381 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Evaluation board Rev.A for AK5381 |
| AK5381ET | 制造商:AKM 制造商全稱:AKM 功能描述:24Bit 96kHz ツヒ ADC |
| AK5381ETP-E2 | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述: |
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