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參數(shù)資料
| 型號： | AK5354VT |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:55; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:16-35 RoHS Compliant: No |
| 中文描述： | 低功耗20位ADC，美國PGA |
| 文件頁數(shù)： | 9/19頁 |
| 文件大?。?/td> | 109K |
| 代理商： | AK5354VT |
ASAHI KASEI
[AK5354]
MS0054-E-01
2001/01
- 9 -
OPERATION OVERVIEW
n
System Clock
The clocks that are required to operate are MCLK (256fs/384fs), LRCK (fs) and BCLK (40fs
～
). The master clock
(MCLK) should be synchronized with LRCK but the phase is free of care. The frequency of MCLK can be input 256fs or
384fs. When the 384fs is input, the internal master clock is divided into 2/3 automatically.
*fs is sampling frequency.
All external clocks (MCLK, BCLK and LRCK) should always be present whenever ADC is in operation. If these clocks
are not provided, the AK5354 may draw excess current and it is not possible to operate properly because utilizes dynamic
refreshed internally. If the external clocks are not present, the AK5354 should be in the power-down mode.
n
Audio Data I/F Format
Using SDTO, BCLK and LRCK pins are connected to external system. Audio data format has two kinds of mode, the data
format is MSB-first, 2’s compliment. Setting by DIF bit. The initial value is DIF = “0”.
No.
0
1
DIF bit
0
1
SDTO (ADC)
20bit MSB justified
I
2
S Compatible
Table 1. Audio Data Format
LRCK
BCLK
≥
40fs
≥
40fs
Lch: “H”, Rch: “L”
Lch: “L”, Rch: “H”
LRCK
BCLK(64fs)
SDTO(o)
0
1
2
12
13
14
20
21
31
0
1
2
12
13
14
20
21
31
0
19
1
18
0
19 18
8
7
6
0
19
19:MSB, 0:LSB
Lch Data
Rch Data
8
7
6
Figure 6. Audio Data Format (No.0)
LRCK
BCLK(64fs)
SDTO(o)
0
1
2
3
19
20
21
22
0
1
2
18
19
20
22
21
0
1
23
24
25
23
24
25
19
18
0
19 18
1
0
19:MSB, 0:LSB
Lch Data
Rch Data
1
Figure 7. Audio Data Format (No.1)
n
Digital High Pass Filter
The AK5354 has a Digital High Pass Filter (HPF) to cancel DC-offset in ADC and IPGA. The cut-off frequency of the
HPF is 3.4Hz at fs=44.1kHz. It also scales with the sampling frequency (fs). And digital HPF can be selected by ON/OFF
of HPF bit.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| AK5355 | 制造商:AKM 制造商全稱:AKM 功能描述:LOW POWER 16BIT ADC |
| AK5355_05 | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 16bit ツヒ ADC |
| AK5355VN | 制造商:AKM 制造商全稱:AKM 功能描述:PLL & MIC-AMP 16-Bit Stereo ADC |
| AK5355VNP-L | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:16BIT AD + 15DB AMP |
| AK5355VT | 制造商:AKM 制造商全稱:AKM 功能描述:LOW POWER 16BIT ADC |
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