- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385094 > AK4682 (Asahi Kasei Microsystems Co.,Ltd) Multi-channel CODEC with 2Vrms Stereo Selector PDF資料下載
參數(shù)資料
| 型號： | AK4682 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | Multi-channel CODEC with 2Vrms Stereo Selector |
| 中文描述： | 多通道選擇與2Vrms的立體聲編解碼器 |
| 文件頁數(shù)： | 31/43頁 |
| 文件大?。?/td> | 667K |
| 代理商： | AK4682 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當(dāng)前第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁
[AK4682]
MS0610-E-01
2007/07
- 31 -
1-3. ACKNOWLEDGE
ACKNOWLEDGE is a software convention used to indicate successful data transfers. The transmitting device will
release the SDA line (HIGH) after transmitting eight bits. The receiver must pull down the SDA line during the
acknowledge clock pulse so that that it remains stable “L” during “H” period of this clock pulse. The AK4682 will
generates an acknowledge after each byte has been received.
In the read mode, the slave, the AK4682 will transmit eight bits of data, release the SDA line and monitor the line for an
acknowledge. If an acknowledge is detected and no STOP condition is generated by the master, the slave will continue
to transmit data. If an acknowledge is not detected, the slave will terminate further data transmissions and await the
STOP condition.
SCL FROM
MASTER
acknowledge
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
1
9
8
START
CONDITION
Clock pulse
for acknowledge
not acknowledge
Figure 16. Acknowledge on the I
2
C-bus
1-4. FIRST BYTE
The first byte, which includes seven bits of slave address and one bit of R/W bit, is sent after the START condition. If
the transmitted slave address matches an address for one of the device, the receiver who has been addressed pulls down
the SDA line.
The most significant five bits of the slave address are fixed as “00100”. The next two bits are “10”. These two bits
identify the specific device on the bus. The eighth bit (LSB) of the first byte (R/W bit) defines whether a write or read
condition which the master requests. A “1” indicates that the read operation is to be executed. A “0” indicates that the
write operation is to be executed.
0
0
1
0
0
1
0
R/W
Figure 17. The First Byte
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4682EQ | Multi-channel CODEC with 2Vrms Stereo Selector |
| AK4683_07 | Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683EQ | Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683 | Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4702EQ | 2ch DAC with AV SCART switch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4682AEQ | 功能描述:IC CODEC MULTI-CHANNEL 48LQFP 制造商:akm semiconductor inc. 系列:* 零件狀態(tài):上次購買時間 標(biāo)準(zhǔn)包裝:1,000 |
| AK4682EQ | 制造商:AKM 制造商全稱:AKM 功能描述:Multi-channel CODEC with 2Vrms Stereo Selector |
| AK4683 | 制造商:AKM 制造商全稱:AKM 功能描述:Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683_07 | 制造商:AKM 制造商全稱:AKM 功能描述:Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683_10 | 制造商:AKM 制造商全稱:AKM 功能描述:Asynchronous Multi-Channel Audio CODEC with DIR/T |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。