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參數(shù)資料
| 型號(hào)： | AK4665AEN |
| 元件分類(lèi)： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, QCC32 |
| 封裝： | 5 X 5 MM, 0.50 MM PITCH, LEAD FREE, QFN-32 |
| 文件頁(yè)數(shù)： | 24/52頁(yè) |
| 文件大?。?/td> | 522K |
| 代理商： | AK4665AEN |
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ASAHI KASEI
[AK4665A]
MS0440-E-01
2006/05
- 30 -
(3) Example for ALC2 Operation
Table 29 shows the examples of the ALC2 setting. The ALC2 operation starts from 0dB.
fs
Register Name
Comment
Data
8kHz
16kHz
32kHz
11.025kHz
22.05kHz
44.1kHz
12kHz
24kHz
48kHz
LMTHP
Limiter detection Level
1
11.5dBV
LTMP1-0
Maximum gain at recovery operation
10
500
s
544
s
500
s
WTMP1-0
Recovery waiting period
11
512ms
557ms
512ms
REFP7-0
Maximum gain at recovery operation
30H
+12dB
LMATP1-0
Limiter ATT Step
00
0.5dB
RGAINP
Recovery GAIN Step
0
0.5dB
PTS1-0
ALC2 recovery transition time
11
128ms
139ms
128ms
ALC2
ALC2 Enable bit
1
Enable
Table 29. Example for the ALC2 setting
The following registers should not be changed during the ALC2 operation. These bits should be changed after the ALC2
operation is finished by ALC2 bit is “0” or PMLO bit is “0”.
- LMTHP, LTMP1-0, LMATP1-0, WTMP1-0, RGAINP, REFP5-0, PTS1-0
ALC2=OFF
WR (LMATP1-0, RGAINP, WT MP1-0)
WR (REFP5-0)
ALC2 Operation
WR (ALC2= “1”)
Example:
Limiter Cycle = 544
s @ fs=44.1kHz
Recovery Cycle = 557ms @ fs= 44.1kHz
Limiter and Recovery Step = 1
Maximum Gain = +12dB
Limiter Detection Level =
11.5dBV
Recovery Transition Time = 139ms @ fs=44.1kHz
ALC2 bit = “1”
(1) Addr=12H, Data=18H
(3) Addr=11H, Data=30H
(5) Addr=12H, Data=38H
WR (LMTHP, LTMP1-0)
(2) Addr=13H, Data=18H
WR (PTS1-0)
(4) Addr =14H, Data=C0H
Note : WR : Write
Figure 18. Registers set-up sequence at ALC2 operation
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