參數(shù)資料
型號: AK4626AVQ
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: High Performance Multi-channel Audio CODEC
中文描述: 高性能多通道音頻解碼器
文件頁數(shù): 25/40頁
文件大?。?/td> 573K
代理商: AK4626AVQ
ASAHI KASEI
[AK4626A]
MS0397-E-00
2005/06
- 25 -
Soft mute operation
Soft mute operation is performed at digital domain. When the SMUTE pin goes to “H”, the output signal is attenuated by
-
during ATT_DATA
×
ATT transition time (Table 14) from the current ATT level.
When the SMUTE pin is returned to
“L”, the mute is cancelled and the output attenuation gradually changes to the ATT level during ATT_DATA
×
ATT
transition time. If the soft mute is cancelled before attenuating to -
after starting the operation, the attenuation is
discontinued and returned to ATT level by the same cycle.
The soft mute is effective for changing the signal source
without stopping the signal transmission.
SMUTE bit
Attenuation
DZF1,2
ATT Level
-
AOUT
8192/fs
GD
(2)
GD
(1)
(3)
(4)
(1)
Notes:
(1) ATT_DATA
×
ATT transition time (Table 14). For example, in Normal Speed Mode, this time is 1792LRCK cycles
(1792/fs) at ATT_DATA=00H. ATT transition of the soft-mute is from 00H to 7FH
(2) The analog output corresponding to the digital input has a group delay, GD.
(3) If the soft mute is cancelled before attenuating to -
after starting the operation, the attenuation is discontinued and
returned to ATT level by the same cycle.
(4) When the input data at all the channels of the group are continuously zeros for 8192 LRCK cycles, DZF pin of each
channel goes to “H”. DZF pin immediately goes to “L” if the input data of either channel of the group are not zero
after going DZF “H”.
Figure 13. Soft mute and zero detection
System Reset
The AK4626A should be reset once by bringing PDN = “L” upon power-up. The AK4626A is powered up and the
internal timing starts clocking by LRCK “
” after exiting reset and power down state by MCLK. The AK4626A is in the
power-down mode until MCLK and LRCK are input.
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