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參數(shù)資料
| 型號： | AK4543 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | AC’97 Rev 2.1 Multimedia Audio CODEC |
| 中文描述： | AC\u0026#39;97音效活2.1多媒體音頻編解碼器 |
| 文件頁數(shù)： | 12/31頁 |
| 文件大?。?/td> | 385K |
| 代理商： | AK4543 |
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[ASAHI KASEI]
[AK4543]
<M0046-E-01>
1999/01
- 12 -
PCM(dac)
Right
All
0
All
0
12
11
10
9
8
7
6
5
4
3
2
1
48kHz
Data Phase
Tag Phase
Slot
0
SYNC
All
0
All
0
All
0
All
0
All
0
All
0
All
0
PCM(dac)
Right
PCM(dac)
Left
Command
Data
Command
Address
TAG
All
0
All
0
All
0
All
0
All
0
All
0
All
0
All
0
PCM(adc)
Right
PCM(adc)
Left
Status
Data
Status
Address
SDATA
IN
TAG
All
0
All
0
All
0
All
0
PCM(dac)
Right
PCM(dac)
Left
All
0
All
0
All
0
Command
Data
Command
Address
SDATA
OUT
TAG
All
0
All
0
All
0
All
0
All
0
PCM(dac)
Left
All
0
All
0
Command
Data
Command
Address
TAG
All
0
Codec ID1:Codec ID0=0:0 or 0:1
Codec ID1:Codec ID0=1:0
Codec ID1:Codec ID0=1:1
AC-link protocol identifies 13slots of data per frame. The frequency of sync is fixed to 48kHz. Only Slot 0, which is
the Tag phase, is 16bits, all other slots are 20bits in length. These slots are explained in later sections.
AC-link Audio Output Frame (SDATA_OUT)
a)
Slot 0
1/0
1/0
Slot6
Slot5
Slot4
Slot3
Slot2
Slot1
Valid
Frame
Bit15 Bit14
1/0
SYNC
Slot 1
Slot 0
1 BIT_CLK delay
SDATA_OUT
BIT_CLK
1/0 1/0
0
0
Slot10
0
0
0
Slot9
Slot8
Slot7
Slot11 Slot12
0
0
0
0
0
0
Bit13 Bit12
Bit11
Bit10
Bit9
Bit8
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Primary codec (Codec ID1: Codec ID0 = 0 : 0)
0
0
Slot6
Slot5
Slot4
Slot3
Slot2
Slot1
Valid
Frame
Bit15 Bit14
1/0
SYNC
Slot 1
Slot 0
1 BIT_CLK delay
SDATA_OUT
BIT_CLK
1/0 1/0
1/0
0
Slot10
1/0
0
0
Slot9
Slot8
Slot7
Slot11 Slot12
1/0
1/0
1/0
0
0
1/0
Bit13 Bit12
Bit11
Bit10
Bit9
Bit8
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Secondary codec (Codec ID1 : Codec ID0 = 0 : 1 or 1 : 0 or 1 :1 )
The AK4543 checks bit15 (valid frame bit). Note that when the valid frame bit is 1, at least one bit14-6 (slot 1-
9) or bit1-0 must be valid, bit5-2 will be 0and should be ignored.
If bit15 is 0, the AK4543 ignores all following information in the frame.
The AK4543 then checks the validity of each bit in the TAG phase (slot 0).
If each bit is 0, the AK4543 ignores the slot indicated by 0. On the other hand, if each bit is 1, the slot is valid.
All bits in slot10-12(bit5-3) are 0 and bit2 is also 0.
The AK4543 monitors bit1 and 0, which are codec ID configuration bits used in multiple codec implementations.
These bits are used to identify which codec the frame data is issued to.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4543VQ | AC’97 Rev 2.1 Multimedia Audio CODEC |
| AK4544A | AC97 MULTIMEDIA AUDIO CODEC WITH SRC |
| AK4544AVQ | CABLE ASSEMBLY; BNC MALE TO N MALE; 50 OHM, RG223/U COAX, DOUBLE SHIELDED; 36" CABLE LENGTH |
| AK4544 | AC97 MULTIMEDIA AUDIO CODEC WITH SRC |
| AK4545 | AC97 AUDIO CODEC WITH SRC AND DIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4543VQ | 制造商:AKM 制造商全稱:AKM 功能描述:AC’97 Rev 2.1 Multimedia Audio CODEC |
| AK4544 | 制造商:AKM 制造商全稱:AKM 功能描述:AC97 MULTIMEDIA AUDIO CODEC WITH SRC |
| AK4544A | 制造商:AKM 制造商全稱:AKM 功能描述:AC97 MULTIMEDIA AUDIO CODEC WITH SRC |
| AK4544AVQ | 制造商:AKM 制造商全稱:AKM 功能描述:AC97 MULTIMEDIA AUDIO CODEC WITH SRC |
| AK4545 | 制造商:AKM 制造商全稱:AKM 功能描述:AC97 AUDIO CODEC WITH SRC AND DIT |
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