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參數(shù)資料
| 型號： | AK4388VT |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 192kHz 24-Bit 2ch ツヒ DAC |
| 中文描述： | 192kHz的24位2通道ツヒ數(shù)模轉(zhuǎn)換器 |
| 文件頁數(shù)： | 6/18頁 |
| 文件大?。?/td> | 198K |
| 代理商： | AK4388VT |
ASAHI KASEI
[AK4388]
MS0485-E-01
2006/07
- 6 -
DC CHARACTERISTICS
(Ta=25
°
C; VDD=4.5
～
5.5V)
Parameter
High-Level Input Voltage
Low-Level Input Voltage
High-Level Output Voltage (Iout=-80μA)
Low-Level Output Voltage (Iout=80μA)
Input Leakage Current (Note 11)
Note: 11. Except DIF1 and DEM pins. DIF1 pin has internal pull-up device, DEM pin has internal pull-down device,
nominally 100k
.
SWITCHING CHARACTERISTICS
(Ta=25
°
C; VDD=4.5
～
5.5V; C
L
=20pF)
Parameter
Symbol
Master Clock Frequency
Duty Cycle
dCLK
LRCK Frequency
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
Duty Cycle
Duty
Audio Interface Timing
BICK Period
Normal Speed Mode
Double/Quad Speed Mode
BICK Pulse Width Low
Pulse Width High
BICK “
↑
” to LRCK Edge (Note 12)
LRCK Edge to BICK “
↑
” (Note 12)
SDTI Hold Time
SDTI Setup Time
tSDS
Reset Timing
RSTN Pulse Width (Note 13)
tRST
Notes: 12. BICK rising edge must not occur at the same time as LRCK edge.
13. The AK4388 can be reset by bringing RSTN pin = “L”.
Symbol
VIH
VIL
VOH
VOL
Iin
min
2.2
-
typ
-
-
-
max
-
0.8
-
0.4
±
10
Units
V
V
V
V
μA
VDD-0.4
-
-
-
min
2.048
40
8
32
120
45
1/128fs
1/64fs
30
30
20
20
20
20
150
typ
max
36.864
60
48
96
192
55
Units
MHz
%
kHz
kHz
kHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
fCLK
11.2896
fsn
fsd
fsq
tBCK
tBCK
tBCKL
tBCKH
tBLR
tLRB
tSDH
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