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參數(shù)資料
| 型號： | AK4356VQ |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 192kHz 24 Bit IX-CHANNEL DAC FOR DVD-AUDIO |
| 中文描述： | 192kHz的24位九通道DAC的DVD -音頻 |
| 文件頁數(shù)： | 18/29頁 |
| 文件大?。?/td> | 281K |
| 代理商： | AK4356VQ |
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ASAHI KASEI
[AK4356]
M0072-E-01
1999/09
- 18 -
n
Power-down
All DACs are placed in the power-down mode by bringing PDN pin “L” and each digital filter is also reset at the same time.
The internal register values are initialized by PDN “L”. This reset should always be done after power-up. Because some
click noise occurs at the edge of PDN, the analog output should be muted externally if the click noise influences system
application. Figure 6 shows the power-down/up sequence.
Each DAC can be powered down by each power-down bit (PW1-3) “0”. In this case, the internal register values are not
initialized and the analog output is Hi-Z. Because some click noise occurs, the analog output should be muted externally if
the click noise influences system application.
If DAC1 is in 4 times speed mode (DFS1=1, DFS0=0), DAC2 and DAC3 are automatically powered down. Both analog
outputs go to analog common voltage (AVDD/2).
Normal Operation
Internal
State
PDN
Power-down
Normal Operation
GD
GD
“0” data
D/A Out
(Analog)
D/A In
(Digital)
Clock In
MCLK, LRCK, BICK
(1)
(3)
(6)
DZF
External
MUTE
(5)
(3)
(1)
Mute ON
(2)
(4)
Don’t care
Notes:
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs are floating (Hi -Z) at the power-down mode.
(3) Click noise occurs at the edge of PDN signal. This noise is output even if “0” data is input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the power-down mode (PDN = “L”).
(5) Please mute the analog output externally if the click noise (3) influences system application.
The timing example is shown in this figure.
(6) DZF pins of all channels are “L” in the power-down mode (PDN = “L”).
Figure 6. Power-down/up sequence example
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