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參數(shù)資料
| 型號： | AK4345ET |
| 廠商： | ASAHI KASEI POWER DEVICES CORP |
| 元件分類： | DAC |
| 英文描述： | 100dB 96kHz 24-Bit Stereo 3.3V ツヒ DAC with DIT |
| 中文描述： | SERIAL INPUT LOADING, 24-BIT DAC, PDSO16 |
| 封裝： | 0.65 MM PITCH, LEAD FREE, PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 12/26頁 |
| 文件大?。?/td> | 540K |
| 代理商： | AK4345ET |
[AK4345]
OPERATION OVERVIEW
■
System Clock
The external clocks, which are required to operate the AK4345, are MCLK, BICK and LRCK. The master clock (MCLK)
should be synchronized with LRCK but the phase is not critical. The MCLK is used to operate the digital interpolation
filter and the delta-sigma modulator. The MCLK frequency is detected from the relation between MCLK and LRCK
automatically. The Half speed, the Normal speed and the Double speed mode are selected with the DFS1-0 bits (Table 1).
The sampling speed mode is set depending on the MCLK frequency automatically for Auto mode (DFS1 bit = DFS0 bit =
“1”) (Table 2).
The AK4345 is automatically placed in the reset mode when MCLK stops in the normal operation mode (PDN pin = “H”),
and the analog output becomes the VCOM voltage. After MCLK is input again, the AK4345 is powered up. After exiting
reset by PDN pin at power-up etc., the AK4345 is in the reset mode until MCLK and LRCK are input.
Mode
DFS1
DFS0
Normal Speed
0
0
Double Speed
0
1
Half Speed
1
0
Auto
1
1
Table 1. System Clock Example
MCLK Frequency
Sampling Speed Mode
512/768fs
Normal Speed
128/192/256/384fs
Double Speed
1024/1536fs
Half Speed
Table 2. Auto Mode
■
Audio Interface Format
The Data is shifted in via the SDTI pin using BICK and LRCK inputs. The DIF1-0 bits as shown in Table 3 can select four
serial data modes. In all modes the serial data is MSB-first, 2’s compliment format and is latched on the rising edge of
BICK. Mode 3 can be used for 16bit I
2
S Compatible format by zeroing the unused LSBs at BICK
≥
48fs or BICK = 32fs.
Mode
DIF1
DIF0
0
0
0
16bit, LSB justified
1
0
1
24bit, LSB justified
2
1
0
24bit, MSB justified
3
1
1
16/24bit, I
2
S Compatible
Table 3. Audio Interface Format
fs
MCLK Frequency
256/384/512/768fs
128/192/256/384fs
512/768/1024/1536fs
Table 2
8
～
48kHz
48
～
96kHz
8
～
24kHz
8
～
96kHz
Fs
8
～
48kHz
48
～
96kHz
8
～
24kHz
SDTI Format
BICK
≥
32fs
≥
48fs
≥
48fs
Figure
Figure 10
Figure 11
Figure 12
Figure 13
≥
48fs or 32fs
MS0635-E-00
2007/06
- 12 -
相關PDF資料 |
PDF描述 |
|---|---|
| AK4346 | 3.3V 192kHz 24-Bit 6-Channel DAC |
| AK4346EF | 3.3V 192kHz 24-Bit 6-Channel DAC |
| AK4346VF | 3.3V 192kHz 24-Bit 6-Channel DAC |
| AK4348 | 3.3V 192kHz 24-Bit 8-Channel DAC |
| AK4348EF | 3.3V 192kHz 24-Bit 8-Channel DAC |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AK4346 | 制造商:AKM 制造商全稱:AKM 功能描述:3.3V 192kHz 24-Bit 6-Channel DAC |
| AK4346EF | 制造商:AKM 制造商全稱:AKM 功能描述:3.3V 192kHz 24-Bit 6-Channel DAC |
| AK4346VF | 制造商:AKM 制造商全稱:AKM 功能描述:3.3V 192kHz 24-Bit 6-Channel DAC |
| AK4348 | 制造商:AKM 制造商全稱:AKM 功能描述:3.3V 192kHz 24-Bit 8-Channel DAC |
| AK4348EF | 制造商:AKM 制造商全稱:AKM 功能描述:3.3V 192kHz 24-Bit 8-Channel DAC |
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