參數(shù)資料
型號: AK4340ET
廠商: ASAHI KASEI POWER DEVICES CORP
元件分類: DAC
英文描述: 192kHz 24-Bit Stereo DAC with 2Vrms Output
中文描述: SERIAL INPUT LOADING, 24-BIT DAC, PDSO16
封裝: 6.40 X 5 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, TSSOP-16
文件頁數(shù): 11/21頁
文件大小: 265K
代理商: AK4340ET
ASAHI KASEI
AKM CONFIDENTIAL
[AK4340]
Rev.0.6
2005/11
- 11 -
MCLK
1152fs
Sampling Speed
Normal (fs=32kHz Only)
Normal
Double
Quad
512fs
256fs
128fs
768fs
384fs
192fs
Table 3. Sampling Speed (Auto Setting Mode: Default at Serial control mode)
LRCK
fs
32.0kHz
44.1kHz
48.0kHz
88.2kHz
96.0kHz
176.4kHz
192.0kHz
MCLK (MHz)
384fs
-
-
-
33.8688
36.8640
-
-
128fs
-
-
-
-
-
22.5792
24.5760
192fs
-
-
-
-
-
33.8688
36.8640
256fs
-
-
-
22.5792
24.5760
-
-
512fs
16.3840
22.5792
24.5760
-
-
-
-
768fs
24.5760
33.8688
36.8640
-
-
-
-
1152fs
36.8640
-
-
-
-
-
-
Sampling
Speed
Normal
Double
Quad
Table 4. System Clock Example (Auto Setting Mode)
Audio Serial Interface Format
Data is shifted in via the SDTI pin using BICK and LRCK inputs. In serial control mode, five serial data mode can be
selected by DIF2-0 bits. (See Table 5). In parallel control mode, two serial data mode can be selected by DIF0 pin. (See
Table 6) In all modes the serial data is MSB-first, 2’s compliment format and is latched on the rising edge of BICK. Mode
2 can be used for 16/20 MSB justified formats by zeroing the unused LSBs.
Mode
DIF2
DIF1
DIF0
SDTI Format
0
0
0
0
16bit LSB Justified
1
0
0
1
20bit LSB Justified
2
0
1
0
24bit MSB Justified
3
0
1
1
24bit I
2
S Compatible
4
1
0
0
24bit LSB Justified
Table 5. Audio Data Format in Serial control mode
Mode
DIF0
SDTI Format
2
0
24bit MSB Justified
3
1
24bit I
2
S Compatible
Table 6. Audio Data Format in Parallel control mode
BICK
32fs
40fs
48fs
48fs
48fs
Figure
Figure 6
Figure 7
Figure 8
Figure 9
Figure 7
Default
BICK
48fs
48fs
Figure
Figure 8
Figure 9
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