參數資料
型號: AK4309B
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 16 Bit SCF DAC for Multimedia(用于多媒體音頻系統的16位立體聲D/A轉換器)
中文描述: 16位超臨界援會的多媒體(用于多媒體音頻系統的16位立體聲的D / A轉換器)
文件頁數: 3/14頁
文件大?。?/td> 100K
代理商: AK4309B
ASAHI KASEI
[AK4309B]
0177-E-00
1997/6
- 3 -
PIN/FUNCTION
No.
1
Pin Name
TST1
I/O
I
Function
Test Pin (Pull-down pin)
Must be left floating or tied to DVSS.
Digital Power Supply Pin
Digital Ground Pin
No Connection
Reset Pin
When at "L", the AK4309B is in power-down mode and is held in reset.
The AK4309B should always be reset upon power-up.
Master Clock Input Pin
An external TTL clock should be input on this pin.
The fs is selected by CKS pin.
Master Clock Select Pin
"L": MCLK=256fs, "H": MCLK=384fs
Serial Bit Input Clock Pin
This clock is used to latch SDATA.
Serial Data Input Pin
2's complement MSB-first data is input on this pin.
L/R Clock Pin
This input determines which channel is currently being input on the Serial
Data Input pin, SDATA. "H": Lch, "L": Rch
Rch analog output pin
Lch analog output pin
Common Voltage pin, AVDD/2
Normally connected to AVSS with a 0.1uF ceramic capacitor in parallel with
a 10uF electrolytic cap.
Analog Power Supply Pin
Analog Ground Pin
No Connection
2
3
4
5
DVDD
DVSS
NC
RST
-
-
-
I
6
MCLK
I
7
CKS
I
8
BICK
I
9
SDATA
I
10
LRCK
I
11
12
13
AOUTR
AOUTL
VCOM
O
O
O
14
15
16
17
18
AVDD
AVSS
NC
NC
VREFH
-
-
-
I
"H" Voltage Reference Input Pin
The differential Voltage between VREFH and VREFL inputs set the analog
output range. The VREFH pin is normally connected to AVDD and the
VREFL pin is connected to AVSS. A 0.1uF ceramic capacitor should be as
near to both pins.
"L" Voltage Reference Input Pin
Zero Input Detect Pin
When SDATA of both channels follow a total 8192 LRCK cycles with "0"
input data, this pin goes "H".
* NC pins are not bonded internally.
19
20
VREFL
DZF
I
O
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