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參數(shù)資料
| 型號： | AK4170 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | JT 26C 26#20 PIN GRND PLUG |
| 中文描述： | USB收發(fā)器 |
| 文件頁數(shù)： | 2/10頁 |
| 文件大小： | 82K |
| 代理商： | AK4170 |
[ASAHI KASEI]
[AK4170]
<M0066-E-01> - 2 -
Pin/Function
No.
1
2
Signal Name
NC
OEN
I/O
-
I
Description
Not Connected
Output Enable Pin (CMOS level digital input)
Low input enables transmit data, it is that both INP and INN output onto DP and
DN pins. High input enable receive mode, which disables the outputs of DP and
DN, and the buffer goes into high-z state.
Differential Receiver Output (CMOS level digital output)
When DP > DN, the output is H. When DP < DN, the output is L.
When both DP and DN are L, the output is not guaranteed.
this pin also outputs correctly regardless of the OEN input.
Schmitt Hysteresis Receiver Output for DP (D+) input (CMOS level digital output)
When DP is high level, RSHP is high.
When DP is low level, RSHP is low
this pin also outputs correctly regardless of the OEN input.
Schmitt Hysteresis Receiver Output for DN (D-) input (CMOS level digital output)
When DN is high level, RSHN is high.
When DN is low level, RSHN is low
this pin also outputs correctly regardless of the OEN input.
Suspend Mode Control Pin (CMOS level)
High input forces the RDIFF output to low level, and the AK4170 goes into low
power consumption mode regardless of OEN pin.
Ground Pin
Not Connected
Not Connected
Not Connected
Full Speed/Low Speed Control Input (CMOS digital input)
Low input activates the AK4170 to Low Speed (1.5Mbps) mode.
High input activates the AK4170 to Full Speed (12Mbps) mode.
Transmitter/Receiver Negative Data Output/Input Pin
DN outputs the data of INN logic level when OEN is low
DN disable the output, and goes to high-z state when OEN is high.
Transmitter/Receiver Positive Data Output/Input Pin
DP outputs the data of INP logic level when OEN is low
DP disable the output, and goes to high-z state when OEN is high.
Transmitter Positive Data Input Pin (CMOS digital input)
When OEN is low, DP outputs INP logic level.
When OEN is high, INP does not influence output pins.
Transmitter Negative Data Input Pin (CMOS digital input)
When OEN is low, DN outputs INN logic level.
When OEN is high, INN does not influence output pins.
Power Supply Pin
Connected to VSS with a 0.1uF capacitor.
3
RDIFF
O
4
RSHP
O
5
RSHN
O
6
SUS
I
7
8
9
VSS
NC
NC
NC
FAST
P
-
-
-
I
10
11
12
DN
I/O
13
DP
I/O
14
INP
I
15
INN
I
16
VDD
-
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