參數(shù)資料
型號(hào): AK4113
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 192KHZ 24BIT DIR WITH 6:1 SELECTOR
中文描述: 192kHz 24位處長(zhǎng)與6:1選擇器
文件頁數(shù): 30/49頁
文件大?。?/td> 531K
代理商: AK4113
ASAHI KASEI
[AK4113]
MS0349-E-01
2005/03
- 30 -
Audio Serial Interface Format
The DIF0, DIF1 and DIF2 pins can select eight serial data formats as shown in Table 16. In all formats the serial data is
MSB-first, 2's compliment format. The SDTO is clocked out on the falling edge of BICK and DAUX is latched on the
rising edge of BICK. BICK outputs 64fs clock in Mode 0-5. Mode 6-7 are Slave Modes, and BICK is available up to
128fs at fs=48kHz. If the data word length is equal or less than 20-bits (Mode0-2), the LSBs in the sub-frame are
truncated. In Mode 3-7, the last 4-LSBs are auxiliary data (see Figure 26). When the Parity Error, Bi-phase Error or
Frame Length Error occurs in a sub-frame, the AK4113 continues to output the last normal sub-frame data from SDTO
repeatedly until the error is removed. When the Unlock Error occurs, AK4113 outputs “0” from SDTO. If DAUX is used,
the data is transformed and outputted from SDTO. DAUX is used in Clock Operation Mode 1, 3 and unlock state of
Mode 2. The input data format to DAUX should be left justified except in Mode 5 and 7. In Mode 5 or 7, both the input
data format of DAUX and output data format of SDTO are I
2
S. Mode 6 and 7 are Slave Modes that corresponds to the
Master Mode of Mode 4 and 5. In Slave mode, LRCK and BICK should be synchronized with MCKO1/2.
sub-frame of IEC60958
0
3 4
7 8
11 12
27 28 29 30 31
preamble
Aux.
LSB
MSB
V U C P
0
23
AK4113 Audio Data (MSB First)
LSB
MSB
Figure 26. Bit configuration
LRCK
H/L
H/L
H/L
H/L
H/L
L/H
BICK
Mode DIF2 DIF1 DIF0
DAUX
SDTO
I/O
O
O
O
O
O
O
I/O
O
O
O
O
O
O
0
1
2
3
4
5
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
24-bit, Left justified
24-bit, Left justified
24-bit, Left justified
24-bit, Left justified
24-bit, Left justified
24-bit, I
2
S
16-bit, Right justified
18-bit, Right justified
20-bit, Right justified
24-bit, Right justified
24-bit, Left justified
24-bit, I
2
S
64fs
64fs
64fs
64fs
64fs
64fs
64-128fs
(Note 17)
64-128fs
(Note 17)
6
1
1
0
24-bit, Left justified
24-bit, Left justified
H/L
I
I
Default
7
1
1
1
24-bit, I
2
S
24-bit, I
2
S
L/H
I
I
Table 16. Audio Data Format
Note 17. This frequency must not exceed a maximum BICK frequency that is defined in “Switching Characteristics”.
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