參數(shù)資料
型號(hào): AK4104ET
廠商: ASAHI KASEI POWER DEVICES CORP
元件分類: 消費(fèi)家電
英文描述: 192kHz 24-Bit 3.3V DIT
中文描述: SPECIALTY CONSUMER CIRCUIT, PDSO16
封裝: 0.65 MM PITCH, LEAD FREE, PLASTIC, TSSOP-16
文件頁(yè)數(shù): 10/20頁(yè)
文件大?。?/td> 422K
代理商: AK4104ET
[AK4104]
OPERATION OVERVIEW
Reset and Initialization
The AK4104 should be reset once by bringing PDN = “L” upon power-up. It takes 8 bit clock cycles for the AK4104 to
initialize after PDN pin goes “H”.
MCLK and LRCK Relationship
For correct synchronization, MCLK and LRCK should be derived from the same clock signal either directly (as through a
frequency divider) or indirectly (for example, as through a DSP). The phase relationship between MCLK and LRCK
should be kept after power-up. The MCLK frequencies shown in Table 1 are supported. The internal clock frequency is
set depending on the external MCLK frequency automatically.
MCLK
128fs
192fs
256fs
384fs
512fs
768fs
1024fs
1536fs
Table 1. MCLK Frequency
Fs
16k-192kHz
16k-192kHz
8k-128kHz
8k-96kHz
8k-48kHz
8k-48kHz
8k-32kHz
8k-24kHz
MS0642-E-00
2007/07
- 10 -
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