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參數(shù)資料
| 型號： | AK2574VB |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 156M Laser Diode Driver + APC for Burst Mode |
| 中文描述： | 1.56激光二極管驅(qū)動器apc的突發(fā)模式 |
| 文件頁數(shù)： | 4/30頁 |
| 文件大?。?/td> | 248K |
| 代理商： | AK2574VB |
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ASAHI KASEI
[AK2574]
<MS0266-E-00>
-4-
2003/12
Ⅰ
. Pin Description
The symbo of I/O coumn shows below.
Ai: Analog input, Ai_l: LVPECL input, Ao: Analog output
Di: Digital input, Di_pu: Digital input with pulled-up resistor, Do: Digital output,
Dio_od: Digital input /output (open drain)
PWR: Power or VSS
PIN# Symbol
Function
1
SDA
Serial data input /output (Open drain). Connect to VDD with 4.7k
to 10k
Ω
resistor.
2
NC
NoConnection. Connect tothe VSS (recommended) or leave open.
3
SCL
Serial clock input. The data (SDA) is shifted in at the rising edge of
SCL and is shifted out at the falling edge of SCL.
4
CLKALM
Sets the alarm when detects 1’s or 0’s sequential clock input.
During CLKALM detection, the AK2574 goes into “TX disable”.
The detection time is 100ns (typ). The CLKALM is reset when 1
clock is detected. The polarity can be set with EEPROM.
When SEL=”L”, CLKALM is set “non-detected” polarity.
5
TXDIS
TX Disable.
The polarity can be set with EEPROM. When set “TX disable”,
IMOD and IBIAS are Hi-Z. Use 4.7k
Ω
or more for externally
pulled-up or pulled-down.
6
WP
Write Protect. Internally pulled-up with 20k
Ω
(typ).
“H” sets device address 101000 and only user area of EEPROM
can be accessed as read-only. “L” sets device address as 1010 and
full of EEPROM can be accessed as read/write.
7
CLKN
Negative LVPECL clock input. Input Impedance >= 10k
Ω
.
Connect to VSS when SEL = “L”.
8
CLKP
Positive LVPECL clock input. Input Impedance >= 10k
Ω
.
Connect to VDD or leave open when SEL = “L”.
9
SEL
“H” for latched data with clock. DATA (DATAP – DATAN) and
BRST (BRSTP – BRSTN) are shifted into the falling edge of CLK.
(CLKP – CLKN).
“L” for direct data.
10
DATAN
Negative LVPECL data input. Input Impedance >= 10k
Ω
11
DATAP
Positive LVPECL data input. Input Impedance >= 10k
Ω
12, 13 NC
NoConnection. Connect tothe VSS or leave open.
14
TEST6
Test input. Leave open for normal operation.
15
BRSTN
Negative LVPECL burst contro input.
Input Impedance >= 10k
Ω
16
BRSTP
Positive LVPECL burst control input.
Input Impedance >= 10k
Ω
17
TEST5
Test input. Connect to VSS for normal operation
18
TEST4
Test input. Connect to VSS for normal operation
19
TEST3
Test input. Connect to VSS for normal operation
20
TEST2
Test input. Connect to VSS for normal operation
21
VSSDR
VSS for MOD driver circuit.
22
VDDDR
Power supply for MOD driver circuit.
23
VDDMD
Power supply for MOD current circuit.
24
VSSMD
VSS for MOD current drive circuit.
25, 26 NC
NoConnection. Connect tothe VSS (recommended) or leave open.
I/O
Dio_od
Remark
AC load
≤
100pF
Do not
leave open
AC load
≤
30pF
Di
Do
Di
Do not
leave open
Di_pu
Ai_l
Ai_l
Di
Do not
leave open
Ai_l
Ai_l
Do
Ai_l
Leave open
Ai_l
Di
Di
Di
Di
PWR
PWR
PWR
PWR
Connect to
VSS.
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