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參數(shù)資料
| 型號： | AK2548 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 7 channel E1 Transceiver |
| 中文描述： | 7頻道E1收發(fā)器 |
| 文件頁數(shù)： | 25/30頁 |
| 文件大?。?/td> | 158K |
| 代理商： | AK2548 |
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ASAHI K ASEI [AK2548]
C0028-E-00 1999/9
25
THEORY OF OPERATION
Loss of signal
Loss of signal in channel x is reported by setting LOSx register “high”.
The receiver will indicate loss of signal upon receiving 175 consecutive zeros or detecting input
level being below the threshold(ALOS).
LOSx returns to “l(fā)ow” when the received signal returns to 12.5% ones density and not include
100 consecutive zeros.
When Loss of Signal is detected in channel x, LOSx register is set “high” and LOSx pin becomes
“high”. When LOSx is set “high”, interrupt will be issued on INT pin if MLOSx is “l(fā)ow”. LOSx
pin becomes high regardless of MLOSx status. MLOSx is active-high and masks LOSx interrupt.
LOSx register represents the current status of received signal regardless of the status of the
MLOSx status.
Loss of TCLK
Loss of TCLKx is reported by setting LOTCx “high”. When LOTCx is set “high”, INT output
becomes “high” if MLOTCx is “l(fā)ow”. Even if TCLK return to normal quickly, LOTCx remain
“high” for 126us. MLOTCx is active-high and masks LOTCx interrupt. LOTCx represents the
current status of TCLKx and can be read regardless of the status of the MLOTCx status.
When Loss of TCLKx is detected, TTIPx/TRINGx will be forced to “0”.
Loss of MCLK
Loss of MCLK is reported by setting LOMC “high”. When LOMC goes “high”, INT output
becomes “high” if MLOMC is “l(fā)ow”. Even if MCLK return to normal quickly, LOMC remain
“high” for 126us. MLOMC is active-high and masks LOMC interrupt. LOMC represents the
current status of MCLK and can be read regardless of MLOMC status. When the loss of MCLK
is detected, LOSx register and LOSx pin goes “high” at the same time. Therefore all MLOSx
register must be set to “high” to prevent loss of MCLK from setting INT output.
INT output
INT output goes “high” when the alarm is reported to any one of LOSx, LOTCx or LOMC
registers. This pin can be masked by MLOSx, MLOTCx or MLOMC registers.
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