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參數(shù)資料
| 型號(hào)： | AK2306LV |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | Dual PCM CODEC for ISDN/VoIP TERMINAL ADAPTER |
| 中文描述： | 雙的PCM編解碼器對(duì)ISDN / VoIP終端適配器 |
| 文件頁數(shù)： | 6/38頁 |
| 文件大?。?/td> | 469K |
| 代理商： | AK2306LV |
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ASAHI K ASEI
[AK 2306/LV]
PIN FUNCTION
Pin# Name
I/O
1
VFTP1
Transmit gain is defined by the ratio of R2/R1.
R1 is the external input resister connected to this pin.
R2 is the external feedback resister connected between this pin and GST1.
2
VFTN1
I
Negative analog input of the transmit OPamp(AMPT1) for channel 1.
3
GST1
O
Output of the transmit OPamp(AMPT1) for channel 1.
The external feedback resister is connected between this pin and VFTP1.
4
GSR1
O
Output of the receive OPamp(AMPR1) for channel 1.
5
VFR1
Receive gain is defined by the ratio of R4/R3.
R3 is the external input resister connected to this pin.
R4 is the external feedback resister connected between this pin and VR1.
6
VR1
O
Analog Output equivalent to the received PCM data for channel 1.
Output gain is adjusted by the GA1R.
22
VFTN0
I
Negative analog input of the transmit OPamp(AMPT0) for channel 0.
Transmit gain is defined by the ratio of R2/R1.
R1 is the external input resister connected to this pin.
R2 is the external feedback resister connected between this pin and GST0.
23
VFTP0
I
Positive analog input of the transmit OPamp(AMPT0) for channel 0.
21
GST0
O
Output of the transmit OPamp(AMPT0) for channel 0.
The external feedback resister is connected between this pin and VFTP0.
17
VR0
O
Analog Output equivalent to the received PCM data for channel 0.
Output gain is adjusted by the GA0R
19
VFR0
I
Negative analog input of the receive OPamp(AMTR0) for channel 0.
Receive gain is defined by the ratio of R4/R3.
R3 is the external input resister connected to this pin.
R4 is the external feedback resister connected between this pin and VR0.
20
GSR0
O
Output of the receive OPamp(AMPR0) for channel 0.
10
DX
O
Serial output of PCM data.
The channel 1 data is output following the channel 0 data. The PCM data rate is
synchronized with BCLK. This output remains in the high impedance state except for the
period of transmitting PCM data.
11
DR
I
Serial input of PCM data.
The channel 1 data is received following the channel 0 data. The PCM data rate is
synchronized with BCLK.
8
FS
I
Frame sync input.
This clock is input for the internal PLL which gerenates the internal system clocks. FS
must be 8kHz clock which is synchronized with BCLK.
9
BCLK
I
Bit clock of PCM data interface.
This clock defines the input/output timing of DX and DR.
The frequency of BCLK should be 64 x N kHz(128k – 4096kHz).
MS0093-E -04 6 2001/11
Function
I
Positive analog input of the transmit OPamp(AMPT1) for channel 1.
I
Negative analog input of the receive OPamp(AMTR1) for channel 1.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK2306LVM | 制造商:AKM 制造商全稱:AKM 功能描述:ISDN/VoIP?????????????????￠???????????¨ ????????￡??3?????? ??°??￡??-??3???????????ˉ ?????3??? |
| AK2306VM | 制造商:AKM 制造商全稱:AKM 功能描述:ISDN/VoIP?????????????????￠???????????¨ ????????￡??3?????? ??°??￡??-??3???????????ˉ ?????3??? |
| AK2307 | 制造商:AKM 制造商全稱:AKM 功能描述:SPEECH CODEC for Digital Key telephone (5.0V/3.3V) |
| AK2307LV | 制造商:AKM 制造商全稱:AKM 功能描述:SPEECH CODEC for Digital Key telephone (5.0V/3.3V) |
| AK2308LV | 制造商:AKM 制造商全稱:AKM 功能描述:AK2308LV |
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