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IGLOO PLUS DC and Switching Characteristics
2-34
Revision 16
1.8 V LVCMOS
Low-voltage CMOS for 1.8 V is an extension of the LVCMOS standard (JESD8-5) used for general-
purpose 1.8 V applications. It uses a 1.8 V input buffer and a push-pull output buffer.
Table 2-52 Minimum and Maximum DC Input and Output Levels
1.8 V
LVCMOS
VIL
VIH
VOL
VOH
IOL IOH
IOSL
IOSH
IIL1 IIH2
Drive
Strength Min., V
Max., V
Min., V
Max., V Max., V
Min., V
mA mA Max., mA3 Max., mA3 A4 A4
2 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45
2
9
11
10
4 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45
4
17
22
10
6 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45 6
6
35
44
10
8 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
3.6
0.45 VCCI 鈥� 0.45
8
35
44
10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where 鈥�0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges.
3. Currents are measured at high temperature (100掳C junction temperature) and maximum voltage.
4. Currents are measured at 85掳C junction temperature.
5. Software default selection highlighted in gray.
Figure 2-9 AC Loading
Table 2-53 AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
CLOAD (pF)
01.8
0.9
5
Note: *Measuring point = Vtrip. See Table 2-23 on page 2-21 for a complete table of trip points.
Test Point
Enable Path
Datapath
5 pF
R = 1 k
R to VCCI for tLZ / tZL / tZLS
R to GND for tHZ / tZH / tZHS
5 pF for tZH / tZHS / tZL / tZLS
5 pF for tHZ / tLZ
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AGLP125V5-CSG281I IC FPGA IGLOO PLUS 125K 281-CSP
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