- 鎮ㄧ従鍦ㄧ殑浣嶇疆锛�璨疯常IC缍� > PDF鐩寗4531 > AGLP030V2-CSG201 (Microsemi SoC)IC FPGA IGLOO PLUS 30K 201-CSP PDF璩囨枡涓嬭級
鍙冩暩璩囨枡
| 鍨嬭櫉锛� | AGLP030V2-CSG201 |
| 寤犲晢锛� | Microsemi SoC |
| 鏂囦欢闋佹暩锛� | 74/134闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC FPGA IGLOO PLUS 30K 201-CSP |
| 妯欐簴鍖呰锛� | 384 |
| 绯诲垪锛� | IGLOO PLUS |
| 閭忚集鍏冧欢/鍠厓鏁革細 | 792 |
| 杓稿叆/杓稿嚭鏁革細 | 120 |
| 闁€鏁革細 | 30000 |
| 闆绘簮闆诲锛� | 1.14 V ~ 1.575 V |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 宸ヤ綔婧害锛� | 0°C ~ 70°C |
| 灏佽/澶栨锛� | 201-VFBGA锛孋SBGA |
| 渚涙噳鍟嗚ō鍌欏皝瑁濓細 | 201-CSP锛�8x8锛� |
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IGLOO PLUS DC and Switching Characteristics
2-30
Revision 16
Timing Characteristics
Applies to 1.5 V DC Core Voltage
Applies to 1.2 V DC Core Voltage
Table 2-42 3.3 V LVCMOS Wide Range Low Slew 鈥� Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70掳C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.7 V
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option1
Speed
Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
100 A
4 mA
STD
0.97
5.85 0.18 1.18
1.64
0.66
5.86 5.05 2.57 2.57
ns
100 A
6 mA
STD
0.97
4.70 0.18 1.18
1.64
0.66
4.72 4.27 2.92 3.19
ns
100 A
8 mA
STD
0.97
4.70 0.18 1.18
1.64
0.66
4.72 4.27 2.92 3.19
ns
100 A
12 mA
STD
0.97
3.96 0.18 1.18
1.64
0.66
3.98 3.70 3.16 3.59
ns
100 A
16 mA
STD
0.97
3.96 0.18 1.18
1.64
0.66
3.98 3.70 3.16 3.59
ns
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is 卤100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-43 3.3 V LVCMOS Wide Range High Slew 鈥� Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70掳C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.7 V
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option1
Speed
Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ Units
100 A
4 mA
STD
0.97
3.39
0.18
1.18
1.64
0.66
3.41
2.69 2.57 2.73
ns
100 A
6 mA
STD
0.97
2.79
0.18
1.18
1.64
0.66
2.80
2.17 2.92 3.36
ns
100 A
8 mA
STD
0.97
2.79
0.18
1.18
1.64
0.66
2.80
2.17 2.92 3.36
ns
100 A
12 mA
STD
0.97
2.47
0.18
1.18
1.64
0.66
2.48
1.91 3.16 3.76
ns
100 A
16 mA
STD
0.97
2.47
0.18
1.18
1.64
0.66
2.48
1.91 3.16 3.76
ns
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is 卤100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
3. Software default selection highlighted in gray.
鐩搁棞PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| AGLP030V2-CS201 | IC FPGA IGLOO PLUS 30K 201-CSP |
| A3P125-PQ208 | IC FPGA 1KB FLASH 125K 208-PQFP |
| AGLN125V5-CSG81I | IC FPGA NANO 1KB 125K 81-CSP |
| AGLN125V5-ZCSG81I | IC FPGA NANO 1KB 125K 81-CSP |
| AGLP030V5-CS201 | IC FPGA IGLOO PLUS 30K 201-CSP |
鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁� |
鍙冩暩鎻忚堪 |
|---|---|
| AGLP030V2-CSG201I | 鍔熻兘鎻忚堪:IC FPGA IGLOO PLUS 30K 201-CSP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従鍫村彲绶ㄧ▼闁€闄ｅ垪锛� 绯诲垪:IGLOO PLUS 妯欐簴鍖呰:152 绯诲垪:IGLOO PLUS LAB/CLB鏁�:- 閭忚集鍏冧欢/鍠厓鏁�:792 RAM 浣嶇附瑷�:- 杓稿叆/杓稿嚭鏁�:120 闁€鏁�:30000 闆绘簮闆诲:1.14 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 85°C 灏佽/澶栨:289-TFBGA锛孋SBGA 渚涙噳鍟嗚ō鍌欏皝瑁�:289-CSP锛�14x14锛� |
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| AGLP030V2-CSG289 | 鍔熻兘鎻忚堪:IC FPGA IGLOO PLUS 30K 289-CSP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従鍫村彲绶ㄧ▼闁€闄ｅ垪锛� 绯诲垪:IGLOO PLUS 妯欐簴鍖呰:152 绯诲垪:IGLOO PLUS LAB/CLB鏁�:- 閭忚集鍏冧欢/鍠厓鏁�:792 RAM 浣嶇附瑷�:- 杓稿叆/杓稿嚭鏁�:120 闁€鏁�:30000 闆绘簮闆诲:1.14 V ~ 1.575 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 85°C 灏佽/澶栨:289-TFBGA锛孋SBGA 渚涙噳鍟嗚ō鍌欏皝瑁�:289-CSP锛�14x14锛� |
| AGLP030-V2CSG289ES | 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology |
| AGLP030-V2CSG289I | 鍒堕€犲晢:ACTEL 鍒堕€犲晢鍏ㄧū:Actel Corporation 鍔熻兘鎻忚堪:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology |
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