2-62 Revision 23 1.8 V LVCMOS Low-voltage CMOS for 1.8 V is an extension of the LVCMOS standard (JES" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� AGL250V2-VQG100
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 227/250闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA IGLOO 1.2-1.5V 100VQFP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 90
绯诲垪锛� IGLOO
閭忚集鍏冧欢/鍠厓鏁�(sh霉)锛� 6144
RAM 浣嶇附瑷�(j矛)锛� 36864
杓稿叆/杓稿嚭鏁�(sh霉)锛� 68
闁€鏁�(sh霉)锛� 250000
闆绘簮闆诲锛� 1.14 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� 0°C ~ 70°C
灏佽/澶栨锛� 100-TQFP
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 100-VQFP锛�14x14锛�
鍏跺畠鍚嶇ū锛� 1100-1103
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IGLOO DC and Switching Characteristics
2-62
Revision 23
1.8 V LVCMOS
Low-voltage CMOS for 1.8 V is an extension of the LVCMOS standard (JESD8-5) used for general-
purpose 1.8 V applications. It uses a 1.8 V input buffer and a push-pull output buffer.
Table 2-95 Minimum and Maximum DC Input and Output Levels
Applicable to Advanced I/O Banks
1.8 V
LVCMOS
VIL
VIH
VOL
VOH
IOL IOH
IOSH
IOSL
IIL1 IIH2
Drive
Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA3
Max.
mA3
A4 A4
2 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
1.9
0.45
VCCI 鈥� 0.45
2
9
11
10
4 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
1.9
0.45
VCCI 鈥� 0.45
4
17
22
10
6 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
1.9
0.45
VCCI 鈥� 0.45 6
6
35
44
10
8 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
1.9
0.45
VCCI 鈥� 0.45
8
45
51
10
12 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
1.9
0.45
VCCI 鈥� 0.45 12 12
91
74
10
16 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
1.9
0.45
VCCI 鈥� 0.45 16 16
91
74
10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where 鈥�0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges
3. Currents are measured at 100掳C junction temperature and maximum voltage.
4. Currents are measured at 85掳C junction temperature.
5. Software default selection highlighted in gray.
Table 2-96 Minimum and Maximum DC Input and Output Levels
Applicable to Standard Plus I/O Banks
1.8 V
LVCMOS
VIL
VIH
VOL
VOH
IOL IOH
IOSH
IOSL
IIL1 IIH2
Drive
Strength
Min.
V
Max.
V
Min.
V
Max.
V
Max.
V
Min.
VmA mA
Max.
mA3
Max.
mA3
A4 A4
2 mA
鈥�0.3
0.35 * VCCI 0.65 * VCCI
1.9
0.45
VCCI 鈥� 0.45
2
9
11
10
4 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
1.9
0.45
VCCI 鈥� 0.45
4
17
22
10
6 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
1.9
0.45
VCCI 鈥� 0.45 6
6
35
44
10
8 mA
鈥�0.3 0.35 * VCCI 0.65 * VCCI
1.9
0.45
VCCI 鈥� 0.45
8
35
44
10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where 鈥�0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges
3. Currents are measured at 100掳C junction temperature and maximum voltage.
4. Currents are measured at 85掳C junction temperature.
5. Software default selection highlighted in gray.
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