Revision 23 2-37 Table 2-40 I/O Output Buffer Maximum Resistances1
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� AGL250V2-VQ100
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 200/250闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC FPGA 1KB FLASH 250K 100VQFP
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IGLOO Low Power Flash FPGAs
Revision 23
2-37
Table 2-40 I/O Output Buffer Maximum Resistances1
Applicable to Standard I/O Banks
Standard
Drive Strength
RPULL-DOWN
(
)2
RPULL-UP
(
)3
3.3 V LVTTL / 3.3 V LVCMOS
2 mA
100
300
4 mA
100
300
6 mA
50
150
8 mA
50
150
3.3 V LVCMOS Wide Range
100
A
Same as regular 3.3 V LVCMOS Same as regular 3.3 V LVCMOS
2.5 V LVCMOS
2 mA
100
200
4 mA
100
200
6 mA
50
100
8 mA
50
100
1.8 V LVCMOS
2 mA
200
225
4 mA
100
112
1.5 V LVCMOS
2 mA
200
224
1.2 V LVCMOS
1 mA
158
164
1.2 V LVCMOS Wide Range4
100
A
Same as regular 1.2 V LVCMOS Same as regular 1.2 V LVCMOS
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance values depend
on VCCI, drive strength selection, temperature, and process. For board design considerations and detailed output buffer
resistances, use the corresponding IBIS models located at http://www.microsemi.com/soc/download/ibis/default.aspx.
2. R(PULL-DOWN-MAX) = (VOLspec) / IOLspec
3. R(PULL-UP-MAX) = (VCCImax 鈥� VOHspec) / IOHspec
Table 2-41 I/O Weak Pull-Up/Pull-Down Resistances
Minimum and Maximum Weak Pull-Up/Pull-Down Resistance Values
VCCI
R(WEAK PULL-UP)1
(
)
R(WEAK PULL-DOWN)2
(
)
Min.
Max.
Min.
Max.
3.3 V
10 K
45 K
10 K
45 K
3.3 V Wide Range I/Os
10 K
45 K
10 K
45 K
2.5 V
11 K
55 K
12 K
74 K
1.8 V
18 K
70 K
17 K
110 K
1.5 V
19 K
90 K
19 K
140 K
1.2 V
25 K
110 K
25 K
150 K
1.2 V Wide Range I/Os
19 K
110 K
19 K
150 K
Notes:
1. R(WEAK PULL-UP-MAX) = (VCCImax 鈥� VOHspec) / I(WEAK PULL-UP-MIN)
2. R(WEAK PULLDOWN-MAX) = (VOLspec) / I(WEAK PULLDOWN-MIN)
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