參數(shù)資料
型號: AFL5012SZ
英文描述: DC to DC Converter
中文描述: DC至DC轉(zhuǎn)換器
文件頁數(shù): 5/10頁
文件大小: 82K
代理商: AFL5012SZ
www.irf.com
5
AFL50XXD Series
AFL50XXD Circuit Description
Figure I. AFL Dual Output Block Diagram
Figure II. Enable Input Equivalent Circuit
Circuit Operation and Application Information
The AFL series of converters employ a forward switched
mode converter topology. (refer to Figure I.) Operation of
the device is initiated when a DC voltage whose magnitude
is within the specified input limits is applied between pins 1
and 2. If pins 4 and 12 are enabled (at a logical 1 or open)
the primary bias supply will begin generating a regulated
housekeeping voltage bringing the circuitry on the primary
side of the converter to life. Two power MOSFETs used to
chop the DC input voltage into a high frequency square
wave, apply this chopped voltage to the power transformer.
As this switching is initiated, a voltage is impressed on a
second winding of the power transformer which is then
rectified and applied to the primary bias supply. When this
occurs, the input voltage is excluded from the bias voltage
generator and the primary bias voltage becomes internally
generated.
Inhibiting Converter Output
As an alternative to application and removal of the DC volt-
age to the input, the user can control the converter output
by providing TTL compatible, positive logic signals to either
of two enable pins (pin 4 or 12). The distinction between
these two signal ports is that enable 1 (pin 4) is referenced
to the input return (pin 2) while enable 2 (pin 12) is refer-
enced to the output return (pin 8). Thus, the user has
access to an inhibit function on either side of the isolation
barrier. Each port is internally pulled “high” so that when not
used, an open connection on both enable pins permits nor-
mal converter operation. When their use is desired, a logi-
cal “l(fā)ow” on either port will shut the converter down.
ERROR
AMP
& REF
OUTPUT
FILTER
INPUT
FILTER
OUTPUT RETURN
DC INPUT
INPUT RETURN
FB
CONTROL
1
2
4
3
5
6
SYNC INPUT
CURRENT
SENSE
ENABLE 2
SHARE
SHARE
AMPLIFIER
7
11
10
9
12
8
+ OUTPUT
SYNC OUTPUT
ENABLE 1
CASE
PRIMARY
BIAS SUPPLY
- OUTPUT
TRIM
FILTER
OUTPUT
The switched voltage impressed on the secondary output
transformer windings is rectified and filtered to provide the
positive and negative converter output voltages. An error
amplifier on the secondary side compares the positive out-
put voltage to a precision reference and generates an error
signal proportional to the difference. This error signal is
magnetically coupled through the feedback transformer into
the control section of the converter varying the pulse width
of the square wave signal driving the MOSFETs, narrowing
the pulse width if the output voltage is too high and widen-
ing it if it is too low. These pulse width variations provide
the necessary corrections to maintain the magnitude of
output voltage within its’ specified limits.
Because the primary and secondary sides are coupled by
magnetic elements, full isolation from input to output is
achieved.
ancillary features, basic operation of the AFL50XXD series
can be initiated by simply applying an input voltage to pins 1
and 2 and connecting the appropriate loads between pins
7, 8, and 9. Of course, operation of anyconverter with high
power density should not be attempted before secure at-
tachment to an appropriate heat dissipator. (See
Thermal
Considerations,
page 7)
Although incorporating several sophisticated and useful
Disable
100K
290K
180K
1N4148
2N3904
+5.6 V
Pin 4 or
Pin 12
Pin 2 or
Pin 8
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