參數(shù)資料
型號: AFL5005DW
英文描述: DC to DC Converter
中文描述: DC至DC轉(zhuǎn)換器
文件頁數(shù): 6/10頁
文件大?。?/td> 82K
代理商: AFL5005DW
6
www.irf.com
AFL50XXD Series
Figure III. Preferred Connection for Parallel Operation
Synchronization of Multiple Converters
When operating multiple converters, system requirements
often dictate operation of the converters at a common fre-
quency. To accommodate this requirement, the AFL series
converters provide both a synchronization input and out-
put.
Parallel Operation-Current and Stress Sharing
Figure III. illustrates the preferred connection scheme for
operation of a set of AFL converters with outputs operating
in parallel. Use of this connection permits equal current
sharing among the members of a set whose load current
exceeds the capacity of an individual AFL. An important
Internally, these ports differ slightly in their function. In use,
a low on Enable 1 completely shuts down all circuits in the
converter, while a low on Enable 2 shuts down the second-
ary side while altering the controller duty cycle to near zero.
Externally, the use of either port is transparent to the user
save for minor differences in idle current. (See specification
table).
The sync input port permits synchronization of an AFL co-
nverter to any compatible external frequency source oper-
ating between 500 and 700 KHz. This input signal should
be referenced to the input return and have a 10% to 90%
duty cycle. Compatibility requires transition times less th an
100 ns, maximum low level of +0.8 volts and a minimum
high
level of +2.0 volts. The sync output of another converter
which has been designated as the master oscillator pro-
vides a convenient frequency source for this mode of op-
eration. When external synchronization is not required, the
sync in pin should be left unconnected thereby permitting
the converter to operate at its’ own internally set frequency.
The sync output signal is a continuous pulse train set at 550
±50 KHz, with a duty cycle of 15 ±5%. This signal is refer-
enced to the input return and has been tailored to be com-
patible with the AFL sync input port. Transition times are
less than 100 ns and the low level output impedance is less
than 50 ohms. This signal is active when the DC input
voltage is within the specified operating range and the con-
verter is not inhibited. The sync output has adequate drive
reserve to synchronize at least five additional converters.
A typical connection is illustrated in Figure III.
Power
Input
(Other Converters)
Share Bus
1
6
AFL
7
12
- Output
Enable 2
+ Output
Return
Trim
Share
Vin
Rtn
Case
Enable 1
Sync Out
Sync In
1
6
AFL
7
12
- Output
Enable 2
+ Output
Return
Trim
Share
Vin
Rtn
Case
Enable 1
Sync Out
Sync In
1
6
AFL
7
12
- Output
Enable 2
+ Output
Return
Trim
Share
Vin
Rtn
Case
Enable 1
Sync Out
Sync In
Optional
Synchronization
Connection
to Positive Load
to Negative Load
feature of the AFL series operating in the parallel mode is
that in addition to sharing the current, the stress induced by
temperature will also be shared. Thus if one member of a
paralleled set is operating at a higher case temperature, the
current it provides to the load will be reduced as
compenstionfor the temperature induced stress on that
device.
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