參數(shù)資料
型號(hào): ADXRS401ABG
廠商: ANALOG DEVICES INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: +-75/s Single Chip Yaw Rate Gyro with Signal Conditioning
中文描述: SPECIALTY ANALOG CIRCUIT, PBGA32
封裝: CSPBGA-32
文件頁(yè)數(shù): 9/12頁(yè)
文件大?。?/td> 308K
代理商: ADXRS401ABG
ADXRS401
SETTING BANDWIDTH
External capacitors CMID and C
OUT
are used in combination
with on-chip resistors to create two low-pass filters to limit the
bandwidth of the ADXRS401’s rate response. The –3 dB
frequency set by R
OUT
and C
OUT
is:
(
OUT
OUT
C
R
π
2
1/
f
Rev. 0 | Page 9 of 12
)
OUT
×
×
×
=
This frequency can be well controlled since R
OUT
has been
trimmed during manufacturing to be 180 k ±1%. Any external
resistor applied between the RATEOUT (1B, 2A) and SUMJ
(1C, 2C) pins will result in:
(
) (
/
EXT
EXT
OUT
R
180
R
180
R
+
×
=
)
The 3 dB frequency is set by RSEN (the parallel combination
of R
SEN1
and R
SEN2
) at about 4.5 k nominal. CMID is less well
controlled, because R
SEN1
and R
SEN2
have been used to trim the
rate sensitivity during manufacturing and have a ±35%
tolerance. Its primary purpose is to limit the high frequency
demodulation artifacts from saturating the final amplifier stage.
Thus, this pole of nominally 400 Hz @ 0.1 μF need not be
precise. Lower frequency is preferable, but its variability usually
requires it to be about 10 times greater (in order to preserve
phase integrity) than the well-controlled output pole. In general,
both 3 dB filter frequencies should be set as low as possible to
reduce the amplitude of these high frequency artifacts, as well as
to reduce the overall system noise.
INCREASING MEASUREMENT RANGE
To increase the full-scale measurement range of the ADXRS401,
place an external resistor between the RATEOUT (1B, 2A) and
SUMJ (1C, 2C) pins. This parallels the internal R
OUT
resistor that
is factory-trimmed to 180 k.
For example, a 330 k external resistor gives approximately
10mV/°/sec sensitivity and a commensurate
50% increase in
the full-scale range. This is effective for up to a 4× increase in
the full-scale range. (The minimum value of the parallel resistor
allowed is 45 k.) Beyond this amount of external sensitivity
reduction, the internal circuitry headroom requirements
prevent further increase in the linear full-scale output range.
The drawbacks of modifying the full-scale range are the
additional output null drift (as much as 2°/sec over
temperature) and the readjustment of the initial null bias. See
Null Adjust section and Application Note AN-625 for details.
TEMPERATURE OUTPUT AND CALIBRATION
It is common practice to temperature-calibrate gyros to
improve their overall accuracy. The ADXRS401 has a
temperature-proportional voltage output that provides input to
such a calibration method. The voltage at TEMP (3F, 3G) is
nominally 2.5 V at 27°C and has a PTAT (proportional to
absolute temperature) characteristic of 8.4 mV/°C. Note that the
TEMP output circuitry is limited to 50
μ
A source current.
Limiting the bandwidth of the device reduces the flat-band
noise during the calibration process, improving the
measurement accuracy at each calibration point.
5G
4G
3A
5V
2G
1F
7F
6A
7D
7C
7B
1C
4A
5A
7E
6G
1D
2A
1E
3G
1B
PDD
12V
+
ADXRS401
1
μ
F
22nF
100nF
22nF
CP2
CP1
PGND
CP4
CP3
CP5
CHARGE PUMP/REG.
TEMP
PTAT
RATE-
OUT
2.5V
DEMOD
RATE
SENSOR
SELF
TEST
100nF
100nF
CMID
AGND
AVCC
ST1
ST2
CORIOLIS SIGNAL CHANNEL
S
SEN
2
R
SEN
1
C
OUT
R
OUT
180k
1%
9k
±
35%
9k
±
35%
SUMJ
2.5V REF
RESONATOR LOOP
0
Figure 15. Block Diagram with External Components
相關(guān)PDF資料
PDF描述
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