參數(shù)資料
型號(hào)： ADV7842KBCZ-5P
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 6/28頁(yè)
文件大小： 0K
描述： IC DECODER 3D/4CH HDMI 256CSBGA
標(biāo)準(zhǔn)包裝： 1
系列： Advantiv®, Xpressview™
類型： HDMI，接收器
應(yīng)用： HDTV，投影儀，機(jī)頂盒
安裝類型： 表面貼裝
封裝/外殼： 256-LBGA，CSBGA
供應(yīng)商設(shè)備封裝： 256-CSPBGA（17x17）
包裝： 托盤(pán)
ADV7842
Rev. B | Page 14 of 28
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
Type
Description
A1
GND
Ground
Ground.
A2
P3
Digital video output
Video Pixel Output Port.
A3
P1
Digital video output
Video Pixel Output Port.
A4
P0
Digital video output
Video Pixel Output Port.
A5
TVDD
Power
Terminator Supply Voltage (3.3 V).
A6
RXB_2
HDMI input
Digital Input Channel 2 Complement of Port B in the HDMI Interface.
A7
RXB_1
HDMI input
Digital Input Channel 1 Complement of Port B in the HDMI Interface.
A8
RXB_0
HDMI input
Digital Input Channel 0 Complement of Port B in the HDMI Interface.
A9
RXB_C
HDMI input
Digital Input Clock Complement of Port B in the HDMI Interface.
A10
GND
Ground
Ground.
A11
RXA_2
HDMI input
Digital Input Channel 2 Complement of Port A in the HDMI Interface.
A12
RXA_1
HDMI input
Digital Input Channel 1 Complement of Port A in the HDMI Interface.
A13
RXA_0
HDMI input
Digital Input Channel 0 Complement of Port A in the HDMI Interface.
A14
RXA_C
HDMI input
Digital Input Clock Complement of Port A in the HDMI Interface.
A15
TVDD
Power
Terminator Supply Voltage (3.3 V).
A16
GND
Ground
Ground.
B1
P5
Digital video output
Video Pixel Output Port.
B2
P4
Digital video output
Video Pixel Output Port.
B3
P2
Digital video output
Video Pixel Output Port.
B4
SYNC_OUT
Miscellaneous digital
Sliced Synchronization Output
B5
TVDD
Power
Terminator Supply Voltage (3.3 V).
B6
RXB_2+
HDMI input
Digital Input Channel 2 True of Port B in the HDMI Interface.
B7
RXB_1+
HDMI input
Digital Input Channel 1 True of Port B in the HDMI Interface.
B8
RXB_0+
HDMI input
Digital Input Channel 0 True of Port B in the HDMI Interface.
B9
RXB_C+
HDMI input
Digital Input Clock True of Port B in the HDMI Interface.
B10
GND
Ground
Ground.
B11
RXA_2+
HDMI input
Digital Input Channel 2 True of Port A in the HDMI Interface.
B12
RXA_1+
HDMI input
Digital Input Channel 1 True of Port A in the HDMI Interface.
B13
RXA_0+
HDMI input
Digital Input Channel 0 True of Port A in the HDMI Interface.
B14
RXA_C+
HDMI input
Digital Input Clock True of Port A in the HDMI Interface.
B15
TVDD
Power
Terminator Supply Voltage (3.3 V).
B16
XTALP
Miscellaneous analog
Input pin for 28.63636 MHz crystal or external 1.8V, 28.63636 MHz Clock Oscillator
Source to Clock the ADV7842.
C1
P7
Digital video output
Video Pixel Output Port.
C2
P6
Digital video output
Video Pixel Output Port.
C3
VS/FIELD
Digital video output
Vertical Synchronization/Field Synchronization. VS is a vertical synchronization output
signal in the CP and HDMI processor. FIELD is a field synchronization output signal in
all interlaced video modes. VS or FIELD can be configured for this pin.
C4
HS/CS
Digital video output
Horizontal Synchronization/Composite Synchronization. HS is a horizontal
synchronization output signal in the CP and HDMI processor. CS (composite
synchronization) signal is a single signal containing both horizontal and vertical
synchronization pulses. HS or CS can be configured for this pin.
C5
GND
Ground
Ground.
C6
HPA_B
Miscellaneous digital
Hot Plug Assert Signal Output for HDMI Port B.
C7
HPA_A
Miscellaneous digital
Hot Plug Assert Signal Output for HDMI Port A.
C8
RXB_5V
HDMI input
5 V Detect Pin for Port B in the HDMI Interface.
C9
RXA_5V
HDMI input
5 V Detect Pin for Port A in the HDMI Interface.
C10
PWRDN1
Miscellaneous digital
Controls the Power-Up of the ADV7842. Should be connected to a digital 3.3 V I/O
supply to power up the ADV7842.
C11
TEST8
Test pin
Tie this pin to ground via 4.7 kΩ resistor.
C12
CVDD
Power
Comparator Supply Voltage (1.8 V).
C13
CVDD
Power
Comparator Supply Voltage (1.8 V).
C14
CVDD
Power
Comparator Supply Voltage (1.8 V).
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