參數(shù)資料
型號： ADV7310KST
廠商： ANALOG DEVICES INC
元件分類： 顏色信號轉(zhuǎn)換
英文描述： Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
中文描述： COLOR SIGNAL ENCODER, PQFP64
封裝： PLASTIC, MS-026BCD, LQFP-64
文件頁數(shù)： 26/84頁
文件大?。?/td> 1099K
代理商： ADV7310KST
REV. A
–26–
ADV7310/ADV7311
LINE 313
LINE 314
LINE 1
t
B
HSYNC
VSYNC
t
A
t
C
Figure 21. Timing Register 1 in PAL Mode
SR7–
SR0
4Ah
Register
SD Timing
Register 0
Bit Description
SD Slave/Master Mode
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
1
Register Setting
Slave Mode
Master Mode
Mode 0
Mode 1
Mode 2
Mode 3
Enabled
Disabled
No delay
2 clk cycles
4 clk cycles
6 clk cycles
– 40 IRE
– 7.5 IRE
A low-high-low transition will reset
the internal SD timing counters
Ta = 1 clk cycle
Ta = 4 clk cycles
Ta = 16 clk cycles
Ta = 128 clk cycles
Tb = 0 clk cycle
Tb = 4 clk cycles
Tb = 8 clk cycles
Tb = 18 clk cycles
Tc = Tb
Tc = Tb + 32 us
1 clk cycle
4 clk cycles
16 clk cycles
128 clk cycles
0 clk cycles
1 clk cycle
2 clk cycles
3 clk cycles
Subcarrier Frequency Bit 7–0
Subcarrier Frequency Bit 15–8
Subcarrier Frequency Bit 23–16
Subcarrier Frequency Bit 31–24
Subcarrier Phase Bit 9–2
Extended Data Bit 7–0
Reset
Values
08h
SD Timing Mode
0
0
1
1
0
1
0
1
SD
BLANK
Input
0
1
SD Luma Delay
0
0
1
1
0
1
0
1
SD Min. Luma Value
0
1
0
SD Timing Reset
x
0
0
0
0
0
0
4Bh
SD
HSYNC
Width
0
0
1
1
0
1
0
1
00h
SD
HSYNC
to
VSYNC
delay
0
0
1
1
0
1
0
1
x
x
0
0
1
1
0
1
0
1
0
1
HSYNC
to Pixel Data Adjust
0
0
1
1
x
x
x
x
x
x
0
1
0
1
x
x
x
x
x
x
4Ch
4Dh
4Eh
4Fh
50h
51h
SD F
SC
Register 0
SD F
SC
Register 1
SD F
SC
Register 2
SD F
SC
Register 3
SD F
SC
Phase
SD Closed
Captioning
SD Closed
Captioning
SD Closed
Captioning
SD Closed
Captioning
SD Pedestal
Register 0
SD Pedestal
Register 1
SD Pedestal
Register 2
SD Pedestal
Register 3
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
16h
7Ch
F0h
21h
00h
00h
Extended Data on Even Fields
52h
Extended Data on Even Fields
x
x
x
x
x
x
x
x
Extended Data Bit 15–8
00h
53h
Data on Odd Fields
x
x
x
x
x
x
x
x
Data Bit 7–0
00h
54h
Data on Odd Fields
x
x
x
x
x
x
x
x
Data Bit 15–8
00h
55h
Pedestal on Odd Fields
17
16
15
14
13
12
11
10
00h
56h
Pedestal on Odd Fields
25
24
23
22
21
20
19
18
00h
57h
Pedestal on Even Fields
17
16
15
14
13
12
11
10
00h
58h
Pedestal on Even Fields
25
24
23
22
21
20
19
18
00h
SD Timing
Register 1
Setting any of these bits to 1 will
disable pedestal on the line number
indicated by the bit settings
SD
HSYNC
to
VSYNC
Rising
Edge Delay [Mode 1 Only]
VSYNC Width [Mode 2 Only]
相關(guān)PDF資料
PDF描述
ADV7311 Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7311KST Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7312 Multiformat 11-Bit HDTV Video Encoder
ADV7312KST Multiformat 11-Bit HDTV Video Encoder
ADV7320KSTZ Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7310KSTZ 制造商:Analog Devices 功能描述:VID ENCODER 6DAC 12-BIT 64LQFP - Bulk
ADV7311 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7311KST 功能描述:IC VID ENC 6-12BIT DAC'S 64LQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7311KST 制造商:Analog Devices 功能描述:Video IC
ADV7312 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat 11-Bit HDTV Video Encoder
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