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參數(shù)資料
| 型號： | ADV7189BBSTZ268H |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat SDTV Video Decoder |
| 中文描述： | 標(biāo)清多格式視頻解碼器 |
| 文件頁數(shù)： | 59/104頁 |
| 文件大小： | 805K |
| 代理商： | ADV7189BBSTZ268H |
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ADV7189B
Interrupt Request Output Operation
When an interrupt event occurs, the interrupt pin INTRQ
goes low with a programmable duration given by
INTRQ_DUR_SEL[1:0].
Rev. B | Page 59 of 104
INTRQ_DURSEL[1:0], Interrupt Duration Select
Address 0x40 (Interrupt Space)[7:6]
Table 76. INTRQ_DUR_SEL
INTRQ_DURSEL[1:0]
Description
00 (default)
3 Xtal periods
01
15 Xtal periods
10
63 Xtal periods
11
Active until cleared
When the active-until-Cleared interrupt duration is selected
and the event that caused the interrupt is no longer in force,
the interrupt persists until it is masked or cleared.
For example, if the ADV7189B loses lock, an interrupt is
generated and the INTRQ pin goes low. If the ADV7189B
returns to the locked state, INTRQ
continues to drive low
until the SD_LOCK bit is either masked or cleared.
Interrupt Drive Level
The ADV7189B resets with open drain enabled and all
interrupts masked off. Therefore, INTRQ is in a high
impedance state after reset. 01 or 10 has to be written to
INTRQ_OP_SEL[1:0] for a logic level to be driven out
from the INTRQ pin.
It is also possible to write to a register in the ADV7189B that
manually asserts the INTRQ pin. This bit is MPU_STIM_INTRQ.
INTRQ_OP_SEL[1:0], Interrupt Duration Select
Address 0x40 (Interrupt Space)[1:0]
Table 77. INTRQ_OP_SEL
INTRQ_OP_SEL[1:0]
Description
00 (default)
Open drain
01
Drive low when active
10
Drive high when active
11
Reserved
Multiple Interrupt Events
If Interrupt Event 1 occurs and then Interrupt Event 2 occurs
before the system controller has cleared or masked Interrupt
Event 1, the ADV7189B does not generate a second interrupt
signal. The system controller should check all unmasked
interrupt status bits since more than one can be active.
Macrovision Interrupt Selection Bits
The user can select between pseudo sync pulse and color stripe
detection as follows:
MV_INTRQ_SEL[1:0], Macrovision Interrupt Selection Bits
Address 0x40 (Interrupt Space)[5:4]
Table 78. MV_INTRQ_SEL
MV_INTRQ_SEL[1:0]
Description
00
Reserved
01 (default)
Pseudo sync only
10
Color stripe only
11
Either pseudo sync or color stripe
Additional information relating to the interrupt system is
detailed in
250H
Table 84.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7189BBSTZ268H2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder |
| ADV7189BKST | 制造商:Analog Devices 功能描述: |
| ADV7189BKSTZ | 功能描述:IC DECODER VIDEO W/ADC 80LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7189BKSTZ10F | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder |
| ADV7189BKSTZ10F2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder |
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