參數(shù)資料
型號: ADV7189B
廠商: Analog Devices, Inc.
英文描述: Multiformat SDTV Video Decoder
中文描述: 標(biāo)清多格式視頻解碼器
文件頁數(shù): 43/104頁
文件大?。?/td> 805K
代理商: ADV7189B
ADV7189B
Table 56. Recommended User Settings for NTSC (See
214H
Figure 22)
Register
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0xE5
0xE6
0xE7
Rev. B | Page 43 of 104
Register Name
Vsync Field Control 1
Vsync Field Control 2
Vsync Field Control 3
Hsync Position Control 1
Hsync Position Control 2
Hsync Position Control 3
Polarity
NTSV_V_Bit_Beg
NTSC_V_Bit_End
NTSC_F_Bit_Tog
Write
0x1A
0x81
0x84
0x00
0x00
0x7D
0xA1
0x41
0x84
0x06
0
ADVANCE BEGIN OF
VSYNC BY NVBEG[4:0]
DELAY BEGIN OF
VSYNC BY NVBEG[4:0]
VSYNC BEGIN
NVBEGSIGN
ODD FIELD
0
1
NO
YES
NVBEGDELO
VSBHO
ADDITIONAL
DELAY BY
1 LINE
ADVANCE BY
0.5 LINE
1
0
1
0
NVBEGDELE
VSBHE
ADDITIONAL
DELAY BY
1 LINE
ADVANCE BY
0.5 LINE
1
0
1
0
NOT VALID FOR USER
PROGRAMMING
Figure 23. NTSC Vsync Begin
NVBEGDELO NTSC Vsync Begin Delay on Odd Field,
Address 0xE5[7]
When NVBEGDELO is 0 (default), there is no delay.
Setting NVBEGDELO to 1 delays Vsync going high on an odd
field by a line relative to NVBEG.
NVBEGDELE NTSC Vsync Begin Delay on Even Field,
Address 0xE5[6]
When NVBEGDELE is 0 (default), there is no delay.
Setting NVBEGDELE to 1 delays Vsync going high on an even
field by a line relative to NVBEG.
NVBEGSIGN NTSC Vsync Begin Sign, Address 0xE5[5]
Setting NVBEGSIGN to 0 delays the start of Vsync. Set for user
manual programming.
Setting NVBEGSIGN to 1 (default), advances the start of Vsync.
Not recommended for user programming.
NVBEG[4:0] NTSC Vsync Begin, Address 0xE5[4:0]
The default value of NVBEG is 00101, indicating the NTSC
Vsync begin position.
For all NTSC/PAL Vsync timing controls, both the V bit in the
AV code and the Vsync on the VS pin are modified.
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