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參數(shù)資料
| 型號： | ADV7180BSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 39/116頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VIDEO DECODER SDTV 64-LQFP |
| 產品變化通告： | ADV7180 Metal Mask Edit 22/Oct/2009 |
| 設計資源： | Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076) |
| 標準包裝： | 1 |
| 類型： | 視頻解碼器 |
| 應用： | 數(shù)碼相機，手機，便攜式視頻 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應商設備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤 |
| 產品目錄頁面： | 788 (CN2011-ZH PDF) |
| 配用： | EVAL-ADV7180LQEBZ-ND - BOARD EVALUATION ADV7180 EVAL-ADV7180LFEBZ-ND - BOARD EVAL FOR ADV7180 LFCSP |
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Data Sheet
ADV7180
Rev. I | Page 29 of 116
SRLS, Select Raw Lock Signal, Address 0x51[6]
Using the SRLS bit, the user can choose between two sources for
determining the lock status (per Bits[1:0] in the Status 1 register).
The TIME_WIN signal is based on a line-to-line evaluation
of the horizontal synchronization pulse of the incoming
video. It reacts quite quickly.
The FREE_RUN signal evaluates the properties of the
incoming video over several fields, taking vertical
synchronization information into account.
Setting SRLS to 0 (default) selects the FREE_RUN signal.
Setting SRLS to 1 selects the TIME_WIN signal.
FSCLE, fSC Lock Enable, Address 0x51[7]
The FSCLE bit allows the user to choose whether the status of
the color subcarrier loop is taken into account when the overall
lock status is determined and presented via Bits[1:0] in the
Status 1 register. This bit must be set to 0 when operating the
ADV7180 in YPrPb component mode to generate a reliable
HLOCK status bit.
When FSCLE is set to 0 (default), only the overall lock status is
dependent on horizontal sync lock.
When FSCLE is set to 1, the overall lock status is dependent on
horizontal sync lock and fSC lock.
CIL[2:0], Count Into Lock, Address 0x51[2:0]
CIL[2:0] determines the number of consecutive lines for which
the lock condition must be true before the system switches into
the locked state and reports this via Status 1[1:0]. The bit counts
the value in lines of video.
Table 25. CIL Function
CIL[2:0]
Number of Video Lines
000
1
001
2
010
5
011
10
100 (default)
100
101
500
110
1000
111
100,000
COL[2:0], Count Out of Lock, Address 0x51[5:3]
COL[2:0] determines the number of consecutive lines for which
the out-of-lock condition must be true before the system switches
into the unlocked state and reports this via Status 1[1:0]. It counts
the value in lines of video.
Table 26. COL Function
COL[2:0]
Number of Video Lines
000
1
001
2
010
5
011
10
100 (default)
100
101
500
110
1000
111
100,000
COLOR CONTROLS
These registers allow the user to control picture appearance,
including control of the active data in the event of video being
lost. These controls are independent of any other controls. For
instance, brightness control is independent of picture clamping,
although both controls affect the dc level of the signal.
CON[7:0], Contrast Adjust, Address 0x08[7:0]
This register allows the user to control contrast adjustment of
the picture.
Table 27. CON Function
CON[7:0]
Description
0x80 (default)
Gain on luma channel = 1
0x00
Gain on luma channel = 0
0xFF
Gain on luma channel = 2
SD_SAT_Cb[7:0], SD Saturation Cb Channel,
Address 0xE3[7:0]
This register allows the user to control the gain of the Cb channel
only, which in turn adjusts the saturation of the picture.
Table 28. SD_SAT_Cb Function
SD_SAT_Cb[7:0]
Description
0x80 (default)
Gain on Cb channel = 0 dB
0x00
Gain on Cb channel = 42 dB
0xFF
Gain on Cb channel = +6 dB
SD_SAT_Cr[7:0], SD Saturation Cr Channel,
Address 0xE4[7:0]
This register allows the user to control the gain of the Cr channel
only, which in turn adjusts the saturation of the picture.
Table 29. SD_SAT_Cr Function
SD_SAT_Cr[7:0]
Description
0x80 (default)
Gain on Cr channel = 0 dB
0x00
Gain on Cr channel = 42 dB
0xFF
Gain on Cr channel = +6 dB
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7180BSTZ | 制造商:Analog Devices 功能描述:Video IC |
| ADV7180BSTZ-REEL | 功能描述:IC VIDEO DECODER SDTV 64-LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 標準包裝:250 系列:- 類型:電平移位器 應用:LCD 電視機/監(jiān)控器 安裝類型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤 供應商設備封裝:28-WQFN（4x4）裸露焊盤 包裝:帶卷 (TR) 其它名稱:296-32523-2TPS65198RUYT-ND |
| ADV7180KCP32Z | 功能描述:IC VIDEO DECODER 10BIT 32LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| ADV7180KCP32Z-RL | 功能描述:IC VIDEO DECODER 10BIT 32LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| ADV7180KST48Z | 功能描述:IC VID DECOD SDTV 10BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調諧器 應用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應商設備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
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