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參數(shù)資料
| 型號： | ADV7175A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | High Quality, 10-Bit, Digital CCIR-601 to PAL/NTSC Video Encoder |
| 中文描述： | 高品質(zhì)，10位，數(shù)字無線電咨詢委員會，601到PAL / NTSC制式視頻編碼器 |
| 文件頁數(shù)： | 25/52頁 |
| 文件大?。?/td> | 629K |
| 代理商： | ADV7175A |
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ADV7175A/ADV7176A
–25–
REV. B
CLOSE D CAPT IONING E VE N FIE LD
DAT A RE GIST E R 1–0 (CE D15–CE D00)
(Address [SR4–SR0] = 09–08H)
T hese 8-bit wide registers are used to set up the closed captioning
extended data bytes on even fields. Figure 36 shows how the
high and low bytes are set up in the registers.
BYTE 1
BYTE 0
CED6
CED5
CED3
CED1
CED4
CED2
CED0
CED7
CED14
CED13
CED11
CED9
CED12
CED10
CED8
CED15
Figure 36. Closed Captioning Extended Data Register
CLOSE D CAPT IONING ODD FIE LD
DAT A RE GIST E R 1–0 (CCD15–CCD00)
(Subaddress [SR4–SR0] = 0B–0AH)
T hese 8-bit wide registers are used to set up the closed captioning
data bytes on odd fields. Figure 37 shows how the high and low
bytes are set up in the registers.
BYTE 1
BYTE 0
CCD6
CCD5
CCD3
CCD1
CCD4
CCD2
CCD0
CCD7
CCD14
CCD13
CCD11
CCD9
CCD12
CCD10
CCD8
CCD15
Figure 37. Closed Captioning Data Register
T IMING RE GIST E R 1 (T R17–T R10)
(ADDRE SS [SR4–SR0] = 0CH)
T iming Register 1 is an 8-Bit Wide Register
Figure 38 shows the various operations under the control of
T iming Register 1. T his register can be read from as well as
written to. T his register can be used to adjust the width and
position of the master mode timing signals.
T R1 BIT DE SCRIPT ION
HSY NC Width (T R11–T R10)
T hese bits adjust the
HSYNC
pulsewidth.
HSYNC
to
VSYNC
/FIE LD Delay Control (T R13–T R12)
T hese bits adjust the position of the
HSYNC
output relative to
the FIELD/
VSYNC
output.
HSYNC
to FIE LD Delay Control (T R15–T R14)
When the ADV7175A/ADV7176A is in T iming Mode 1, these
bits adjust the position of the
HSYNC
output relative to the
FIELD output rising edge.
VSYNC
Width (T R15–T R14)
When the ADV7175A/ADV7176A is in T iming Mode 2, these
bits adjust the
VSYNC
pulsewidth.
HSYNC
to Pixel Data Adjust (T R17–T R16)
T his enables the
HSYNC
to be adjusted with respect to the
pixel data. T his allows the Cr and Cb components to be
swapped. T his adjustment is available in both master and slave
timing modes.
MODE RE GIST E R 2 MR2 (MR27–MR20)
(Address [SR4-SR0] = 0DH)
Mode Register 2 is an 8-bit wide register.
Figure 39 shows the various operations under the control of Mode
Register 2. T his register can be read from as well as written to.
MR2 BIT DE SCRIPT ION
Square Pixel Mode Control (MR20)
T his bit is used to set up square pixel mode. T his is available in
slave mode only. For NT SC, a 24.54 MHz clock must be sup-
plied. For PAL, a 29.5 MHz clock must be supplied.
TR11
TR10
TR17
TR12
TR13
TR15
TR16
TR14
HSYNC
WIDTH
0
0
1
1
0
1
0
1
1 x T
PCLK
4 x T
PCLK
16 x T
PCLK
128 x T
PCLK
TR11 TR10
T
A
HSYNC
TO FIELD
RISING EDGE DELAY
(MODE 1 ONLY)
x
x
0
1
T
B
T
B
+ 32
m
s
TR15 TR14
T
C
HSYNC
TO PIXEL
DATA ADJUSTMENT
TR17 TR16
0
0
1
1
0
1
0
1
0 x T
PCLK
1 x T
PCLK
2 x T
PCLK
3 x T
PCLK
HSYNC
TO
FIELD/
VSYNC
DELAY
TR13 TR12
0
0
1
1
0
1
0
1
0 x T
PCLK
4 x T
PCLK
8 x T
PCLK
16 x T
PCLK
VSYNC WIDTH
(MODE 2 ONLY)
TR15 TR14
0
0
1
1
0
1
0
1
1 x T
PCLK
4 x T
PCLK
16 x T
PCLK
128 x T
PCLK
LINE 313
LINE 314
LINE 1
T
B
TIMING MODE 1 (MASTER/PAL)
HSYNC
FIELD/
VSYNC
T
A
T
C
T
B
Figure 38. Timing Register 1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7175AKS | High Quality, 10-Bit, Digital CCIR-601 to PAL/NTSC Video Encoder |
| ADV7176A | High Quality, 10-Bit, Digital CCIR-601 to PAL/NTSC Video Encoder |
| ADV7176AKS | High Quality, 10-Bit, Digital CCIR-601 to PAL/NTSC Video Encoder |
| ADV7176A* | High Quality. 10-Bit. Digital CCIR-601 to PAL/NTSC Video Encoder |
| ADV7175 | Integrated Digital CCIR-601 YCrCb to PAL/NTSC Video Encoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7175AKS | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Quality, 10-Bit, Digital CCIR-601 to PAL/NTSC Video Encoder |
| ADV7175KS | 制造商:AD 制造商全稱:Analog Devices 功能描述:Integrated Digital CCIR-601 YCrCb to PAL/NTSC Video Encoder |
| ADV7176 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Integrated Digital CCIR-601 YCrCb to PAL/NTSC Video Encoder |
| ADV7176A | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Quality, 10-Bit, Digital CCIR-601 to PAL/NTSC Video Encoder |
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