參數(shù)資料
型號(hào)： ADV7173KSTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 47/60頁(yè)
文件大?。?/td> 0K
描述： IC DAC VIDEO NTSC 6-CH 48LQFP
標(biāo)準(zhǔn)包裝： 1
類型： 視頻編碼器
應(yīng)用： 多媒體
電壓 - 電源，模擬： 4.75 V ~ 5.25 V
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 托盤
產(chǎn)品目錄頁(yè)面： 786 (CN2011-ZH PDF)
REV. B
ADV7172/ADV7173
–51–
If an output filter is required for the CVBS, Y, UV, Chroma
and RGB outputs of the ADV7172/ADV7173, the filter shown
below can be used. The plot of the filter characteristics is
shown in Figure 93. An Output Filter is not required if the
outputs of the ADV7172/ADV7173 are connected to most
analog monitors or analog TVs; however, if the output signals
are applied to a system where sampling is used (e.g., Digital
TVs), then a filter is required to prevent aliasing.
1.8 H
22pF
270pF
330pF
FILTER I/P
FILTER O/P
75
Figure 92. Output Filter Used with Output Buffer
APPENDIX 7
OPTIONAL OUTPUT FILTER
FREQUENCY – Hz
0
–40
–80
100M
10M
100k
MAGNUTUDE
–
dB
–10
–20
–30
–50
–60
–70
1M
Figure 93. Output Filter Plot
APPENDIX 8
OPTIONAL DAC BUFFERING
When external buffering is needed of the ADV7172/ADV7173
DAC outputs, the configuration in Figure 94 is recommended.
This configuration shows the DAC outputs, A, B, C, running at
half (18 mA) their full current (36 mA) capability. This will
allow the ADV7172/ADV7173 to dissipate less power; the analog
current is reduced by 50% with a RSET1 = 300
and RSET2 =
600
and an R
LOAD of 75
. This mode is recommended for
3.3 V operation as optimum performance is obtained from the
ADV7172/ADV7173
VREF
PIXEL
PORT
VAA
OUTPUT
BUFFER
DAC A
CVBS
CHROMA
G
LUMA
B
R
300
RSET1
OUTPUT
BUFFER
DAC B
OUTPUT
BUFFER
DAC C
OUTPUT
BUFFER
DAC D
OUTPUT
BUFFER
DAC E
OUTPUT
BUFFER
DAC F
DIGITAL
CORE
600
RSET2
Figure 94. Output DAC Buffering Configuration
DAC outputs at 18 mA with a VAA of 3.3 V. This buffer also adds
extra isolation on the video outputs (see buffer circuit in Figure
95). Note that DACs D, E, and F will always require buffering
as the full-scale output current from these DACs is limited to
8.66 mA. With DACs A, B, and C, buffering is optional, based
on the user requirements for performance and power consumption.
When calculating absolute output full-scale current and voltage,
use the following equations:
VOUT
= IOUT × RLOAD
IOUT
=
VREF
× K
()
RSET
K
= 4.2146 constant ,VREF = 1.235 V
AD8051
VCC+
VCC–
1
5
4
3
2
OUTPUT TO
TV MONITOR
INPUT/
OPTIONAL
FILTER O/P
Figure 95. Recommended Output DAC Buffer
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參數(shù)描述
ADV7173KSTZ-REEL 功能描述:IC DAC VIDEO NTSC 6-CH 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
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ADV7174BCP-REEL 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management
ADV7174KCP 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management
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