- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1901 > ADV7172KSTZ-REEL (Analog Devices Inc)IC DAC VIDEO NTSC 6-CH 48-LQFP PDF資料下載
參數(shù)資料
| 型號： | ADV7172KSTZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 28/60頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC VIDEO NTSC 6-CH 48-LQFP |
| 標準包裝： | 1 |
| 類型： | 視頻編碼器 |
| 應(yīng)用： | 多媒體 |
| 電壓 - 電源，模擬： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 標準包裝 |
| 其它名稱： | ADV7172KSTZ-REELDKR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
REV. B
ADV7172/ADV7173
–34–
TIMING REGISTER 0 (TR07–TR00)
(Address (SR4–SR0) = 0AH)
Figure 52 shows the various operations under the control of
Timing Register 0. This register can be read from as well as
written to.
TR0 BIT DESCRIPTION
Master/Slave Control (TR00)
This bit controls whether the ADV7172/ADV7173 is in master
or slave mode.
Timing Mode Selection (TR02–TR01)
These bits control the timing mode of the ADV7172/ADV7173.
These modes are described in more detail in the Timing and
Control section of the data sheet.
BLANK Input Control (TR03)
This bit controls whether the
BLANK input is used when the
part is in slave mode or whether
BLANK is internally generated.
Luma Delay (TR05–TR04)
These bits control the addition of a delay to the luminance with
respect to the chrominance. Each bit represents a delay of 74 ns.
Min Luma Value (TR06)
The bit is used to control the minimum luma value output by
the ADV7172/ADV7173. When this bit is set to (“1”), the luma
is limited to 7.5 IRE below the blank level. When this bit is set
to (“0”), the luma value can be as low as the sync bottom level.
Timing Register Reset (TR07)
Toggling TR07 from low to high and low again resets the inter-
nal timing counters. This bit should be toggled after power-up,
reset or changed to a new timing mode.
TR01
TR00
TR07
TR02
TR03
TR05
TR06
TR04
TIMING
REGISTER RESET
TR07
BLANK INPUT
CONTROL
0
ENABLE
1
DISABLE
TR03
MASTER/SLAVE
CONTROL
0
SLAVE TIMING
1
MASTER TIMING
TR00
LUMA DELAY
0
0ns DELAY
0
1
74ns DELAY
1
0
148ns DELAY
1
222ns DELAY
TR05 TR04
TIMING MODE
SELECTION
0
MODE 0
0
1
MODE 1
1
0
MODE 2
1
MODE 3
TR02 TR01
MIN LUMA VALUE
0
LUMA MIN =
SYNC BOTTOM
1
LUMA MIN =
BLANK –7.5 IRE
TR06
Figure 52. Timing Register 0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7177KSZ-REEL | IC DAC VIDEO NTSC 3-CH 44MQFP |
| ADV7179KCPZ-REEL | IC ENCODER VID NTSC/PAL 40LFCSP |
| ADV7181CBSTZ | IC VIDEO DECODER SDTV RGB 64LQFP |
| ADV7181DWBCPZ-RL | IC VIDEO DECODER SD/HD 64LFCSP |
| ADV7183BBSTZ | IC VIDEO DECODER NTSC 80-LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7173 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder with Six DACs 10 Bits, Color Control and Enhanced Power Management |
| ADV7173KST | 制造商:Rochester Electronics LLC 功能描述:6-DAC NTSC/PAL ENCODER I.C. - Tape and Reel 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
| ADV7173KST-REEL | 制造商:Analog Devices 功能描述:Video Encoder 6DAC 10-Bit 48-Pin LQFP T/R |
| ADV7173KSTZ | 功能描述:IC DAC VIDEO NTSC 6-CH 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。