參數(shù)資料
型號(hào)： ADV7127KRUZ50-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 10/16頁(yè)
文件大小： 0K
描述： IC DAC VIDEO 50MHZ 3.3/5 24TSSOP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 2,500
設(shè)置時(shí)間： 15ns
位數(shù)： 10
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
功率耗散（最大）： 30mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 24-TSSOP
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電流，單極
采樣率（每秒）： 240M
其它名稱： ADV7127KRUZ50REEL
–3–
REV. 0
ADV7127
5 V TSSOP SPECIFICATIONS
Parameter
Min
Typ
Max
Units
Test Conditions
STATIC PERFORMANCE
Resolution (Each DAC)
10
Bits
Integral Nonlinearity (BSL)
–1
0.4
+1
LSB
Differential Nonlinearity
–1
0.25
+1
LSB
Guaranteed Monotonic
DIGITAL AND CONTROL INPUTS
Input High Voltage, VIH
2V
Input Low Voltage, VIL
0.8
V
PDOWN Input High Voltage
2
3V
PDOWN Input Low Voltage
2
1V
Input Current, IIN
–1
+1
AV
IN = 0.0 V or VAA
PSAVE Pull-Up Current
20
A
PDOWN Pull-Up Current
20
A
Input Capacitance, CIN
10
pF
ANALOG OUTPUTS
Output Current
2.0
18.5
mA
Output Compliance Range, VOC
0
+1.4
V
Output Impedance, ROUT
100
k
Output Capacitance, COUT
10
pF
IOUT = 0 mA
Offset Error
–0.025
+0.025
% FSR
Tested with DAC Output = 0 V
Gain Error
3
–5.0
+5.0
% FSR
FSR = 17.62 mA
VOLTAGE REFERENCE (Ext. and Int.)4
Reference Range, VREF
1.12
1.235
1.35
V
POWER DISSIPATION
Digital Supply Current5
1.5
3
mA
fCLK = 50 MHz
Digital Supply Current5
46
mA
fCLK = 140 MHz
Digital Supply Current5
6.5
10
mA
fCLK = 240 MHz
Analog Supply Current
23
27
mA
RSET = 560
Analog Supply Current
5
mA
RSET = 4933
Standby Supply Current6
3.8
6
mA
PSAVE = Low, Digital and Control
Inputs at VAA
PDOWN Supply Current2
1mA
Power Supply Rejection Ratio
0.1
0.5
%/%
NOTES
1Temperature range T
MIN to TMAX: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz.
2This power-down feature is only available on the ADV7127 in the TSSOP package.
3Gain error = ((Measured (FSC)/Ideal (FSC) –1)
× 100), where Ideal = V
REF /RSET × K × (3FFH ) and K = 7.9896.
4Internal voltage reference is available only on the ADV7127 TSSOP package.
5Digital supply is measured with continuous clock with data input corresponding to a ramp pattern and with an input level at 0 V and V
DD.
6These max/min specifications are guaranteed by characterization to be over 4.75 V to 5.25 V range.
Specifications subject to change without notice.
(VAA = +5 V
5%, VREF = 1.235 V, RSET = 560
, CL = 10 pF. All specifications TMIN to TMAX
1 unless
otherwise noted, TJ MAX = 110 C)
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